I want to drive the ADC10D1500 in DESIQ mode and I have been reviewing the document "Driving the GSPS ADCs in Single-Channel or Dual-Channel Mode for High Bandwidth Applications". In this document I see that Board F has 0.22uF capacitors. However, in "TC1-DESIQ-SBB User Guide" and schematic, that I understand that is the equivalent to board F, these capacitors are 220uF. Which is the recommended value? This evalboard does not have BOM, do you have any recommendation to correctly choose these capacitors?
On the other hand, according to TC1-1-13MA+ datasheet, the insertion loss up to 2Ghz is around 1dB but the measuments performed in "Driving the GSPS ADCs in Single-Channel or Dual-Channel Mode for High Bandwidth Applications" page 16 show an insertion loos of around 3dB from DC to 2GHz, these dBs are due to those capacitors and the ADC itself?
The measurements on the datasheet of ADC10D1500, for example ENOB, are performed for (-0.5dBFS), this means -0.5dBFs at the input pin of the ADC. I mean, if we have around 3dB insertion loss at low MHz and 5dB insertion loss at 1GHz acording to measurements I have to increase the input level to cope with this insertion loss depending on input signal frequency or we will have a worse performance. Is this OK?
Regards,
Sergio
