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ETS with LM97600

Other Parts Discussed in Thread: ADC12J4000

Hello,

I have a plan to design the 500GSPS oscilloscope using Equivalent Time Sampling with LM97600. We will get the ADC data using STRATIX FPGA.

In case of random ETS, I think it is very difficut to design the TDC for time measurering between trigger and ADC sample because it need very fine resolution down to 2ps. I have no idea to do this. So we are thinking about sequential ETS. In case of sequential ETS, I understand we have to control also very fine trigger time to get the delayed ADC sample in each trigger signal. I think this is also very challengable.

It will be very helpful if you give me some idea to implement random or sequential ETS without TDC and delay generator.

Thanks, Sebeom

  • Hi Sebeom

    Please confirm the intended sample rate of the oscilloscope will be 500 Gigasamples/second.

    It this is the case, the timing control and measurement design will be challenging, and I think some type of TDC will be necessary to quantify the time from the trigger event to sampling. Unfortunately I don't have any experience designing Equivalent Time Sampling systems, so I can't provide any additional recommendations.

    Best of luck with your project.

    Regards,

    Jim B

  • Hi Jim

    Could you let me know if there were some your customer who develop the oscilloscope with ETS using LM97600? When we get the ADC data with Altera and Xilinx FPGA, we need to use the high speed tranceiver. And the tranceiver clk, FPGA main clk and ADC clk are asynchronous. So We can't tracking the interested ADC sample after trigger strobe. So Althoug I design the TDC, I think it can be implemented to the system.

    But in case of the other high speed ADCs, We can get the ADC data without tranceiver. So we can tracking the interested ADC sample after trigger strobe. That means we can use TDC.

    If you think LM97600 can be used with ETS, I will study more.....

    Thanks, Sebeom

  • Hi Sebeom

    After more consideration I think the LM97600 may not be the best ADC for your need. The -3dB input bandwidth of the LM97600 is only around 1.2 GHz. That means to achieve higher effective bandwidth, even in your ETS oscilloscope you would need a synchronized high bandwidth track and hold upstream of the LM97600 analog input.

    An alternative device you should consider that has higher input bandwidth and better overall performance is the ADC12J4000. This device also uses a serial data interface, but the interface is JESD204B compliant, therefore is easier to interface with FPGAs. In addition to the JESD204B feature of deterministic latency the ADC12J4000 also has a feature called Timestamp, which uses a high speed differential input as a timing reference to align the analog sample data with a known system timing signal.

    Unfortunately I'm not aware of any of my customers using either of these ADC products in ETS oscilloscopes, so I don't have any information regarding how to implement the necessary TDC features of that type of system.

    I hope this is helpful.

    Best regards,

    Jim B