Hello,
I have a plan to design the 500GSPS oscilloscope using Equivalent Time Sampling with LM97600. We will get the ADC data using STRATIX FPGA.
In case of random ETS, I think it is very difficut to design the TDC for time measurering between trigger and ADC sample because it need very fine resolution down to 2ps. I have no idea to do this. So we are thinking about sequential ETS. In case of sequential ETS, I understand we have to control also very fine trigger time to get the delayed ADC sample in each trigger signal. I think this is also very challengable.
It will be very helpful if you give me some idea to implement random or sequential ETS without TDC and delay generator.
Thanks, Sebeom