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ADS1256 t10 clarificataion

John Weber
Prodigy 160 points

Is the text description for t10 from the datasheet page 6 incorrect? From the timing diagram it looks like the description SHOULD be " /CS HIGH after final SCLK falling edge".  Or is the diagram incorrect and the left arrow of t10 should be under the next falling edge of /CS?

Is this delay required for ALL commands? For RREG, WREG, and RDATA commands t11 is shorter than the 8 * tCLKIN specified for t10. 

Thanks for any clarification you can provide.

  • 0
    Prodigy 160 points
    Correction - "Or is the diagram incorrect and the RIGHT
  • 0
    TI__Mastermind 44680 points

    Hi John,

    Good catch, the text is incorrect and I've made a note of this error. The diagram has it correct...

    • t10 is indicating that /CS must stay low for 8 master clock cycles after the last SCLK falling edge.
    • t11 is indicating that a delay is required between commands.

    The t10 requirement only applies when terminating an SPI "frame". If you use a function to control /CS, just build this delay into your function before setting /CS high.

    The t11 requirement applies whenever sending consecutive commands. Note that the value of t11 depends on which command was just sent.

    Best Regards,
    Chris