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using DAC5687 in PLL mode with TSW1400

Other Parts Discussed in Thread: DAC5687

My application uses the DAC5687 in PLL mode.  I would like to try this with the dac eval board and the TSW1400.  The documentation however appears to describe setting up the system with the DAC5687 in external clock mode.  Is there a way to use these board together with PLL mode?

  • Hi Matt,

    Yes, you can use TSW1400 when using DAC5687 in PLL mode. You will have to provide the clock at CLK1(J3) input of DAC5687 EVM and also provide a clock signal to TSW1400 board at CMOS CLK(J7).

    Your setup will look similar to shown in figure 27 in DAC5687 datasheet. Instead of Agilent 16702B you will be using TSW1400. Your clock generator should be able to provide adjustable skew between the clock signal going to TSW1400 and to the DAC input clock(CLK1).

    Regards,
    Neeraj Gill
    HSCC