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ADS1296 read values

Other Parts Discussed in Thread: ADS1296

Hello,

I use the ADS1296 as following:

Internal ref: 2.4V;   Analog Vdd: 5V; Digital Vdd = 3.3V; LP mode; 250SPS

I use channel 3.

INN3 = gnd and INP = 1.04V.    Input: normal IN.

Either in RDATA and RDATAC I have the following weird results:

Gain = 1   => Channel3 value = 1.0474V (0x37DD0D)    => OK

Gain = 2   => Channel3 value = 1.3962V (0x4A7685)    => Why not 2V????

What am I wrong?

Best regards

Michel

  • Hi Michel,

    The issue that I see is you are violating the input common-mode voltage range of the PGA. As with many amplifiers, the output swing of the PGA in our devices is limited by the analog supplies (AVSS and AVDD). This is explained by Equation 2 on page 32 of the datasheet. In general, single-ended measurements that fix one input to ground are not possible with a unipolar supply.

    For a more visual explanation, refer to the attached PPT slides:

    PGA Implementation and Common Mode.pptx

    Best Regards,

  • Ok, I am checking equation on your PPT slides.
    But I am confused by equation 2 and 3 on page 32.
    If Full scale Range = 2*Vref/Gain (2*2.4/6 = 0.8) so why example uses 350mV for Vmax_diff in equation 2?
    Are Full Scale Range and Vmax_diff different?
    If my gain is 2, Full scale Range is 2.4V isn't it? But in such a case I should have 2.4V > CM > 2.6V ????
  • Close - remember that Vmax_diff is the input voltage before the PGA. Therefore, if you want to check the common-mode limitation with a full-scale input to the ADC (equal to +/- Vref), you would replace (Gain x Vmax_diff) with Vref.

    With AVDD = 5V and (Vdiff_max)*Gain = Vref = 2.4, your input common-mode voltage range is 3.6V >= Vcm >= 1.4V.

    I'm not sure exactly why 350mV was chosen for that example in the datasheet - theoretically, Vmax_diff can be 400mV with PGA = 6 and Vref = 2.4V. This would reduce the Vcm range to 1.6V >=Vcm >= 1.4V on a 3-V supply.

    Regards,