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ADS1282 Question : Continuous-Sync mode

Other Parts Discussed in Thread: ADS1282

Hi,

I would like to ask you some questions about ADS1282 as below.

Would you teach me the meaning?

Q1) the meaning of "interruption of 63 readings" (page 23)

There is a following description on the data sheet.

When a continuous clock is applied to the SYNC pin,
the period must be an integral multiple of the output
data rate or the device re-synchronizes. Note that
synchronization results in the restarting of the digital
filter and an interruption of 63 readings

Could you tell me the meaning of  "interruption of 63 readings"?

Does this mean,

 When we do re-sync, the 63 data will be invalid, correct?

Or the 63 data will not be available??

 

Q2) About continuous-sync mode, the 63 data will be invalid or not available after 2nd SYNC input.

Is my idea correct?

 

Q3) The data condition of under "interruption"

Under the condition of "Interruption", how is the output data condition? "Low" fixed? or just invalid data? (no meaning data?)

 

Q4)  Period matches

There is a following description on the datasheet page 23.

Then, if SYNC is applied
again and the period matches an integral multiple of Figure 48.
Continuous-Sync Timing with Sync the output data rate, the device freely runs without re- Clock synchronization.

My question is the accuracy of the "period matches".

How much is the period tolerance to judge "period matches"?

Thank you very much in advance for your support.

Best Regards,

 

  • Hi Takumi-san,

    To answer your questions...

    1. During continuous-sync mode, the ADS1282 will re-synchronize whenever a pulse is applied to the SYNC pin that is not an integer multiple of the data rate. When this re-synchronization occurs, the ADS1282 will require ~63 conversion cycles (63*fDATA) for the digital filter to settle - during this time the output data will be ZERO, until the data has settled. Therefore, the "re-synchronization" will "interrupt" the continuous conversion process.

    2. When using the FIR filter, the ADS1282's first conversion result will always require ~63 conversion cycles to settle. During this time the the data will be unavailable in pulse-sync mode, or invalid (all ZERO) in continuous-sync mode.

    3. The data will be all fixed to zero during the continuous-sync mode interruption. I would also call this invalid.

    4. The timing of the SYNC pin is fairly strict. It uses the fCLK as a counter to check the period; therefore, the tolerance is about 0.5/fclk.

    Best Regards,
    Chris

  • Hi Chris-san,

    Thank you very much for your kind reply!
    I understood well.

    Best Regards,