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ADS1148 Sparkle Codes

R. Keith Montgomery
Intellectual 270 points
Other Parts Discussed in Thread: ADS1148

Hello,

I noticed what looked like sparkle codes.  I've narrowed the behavior down to sparkle codes after the PGA output is saturated.  In my application, I can not guarantee that the PGA input won't be saturated.  For example, sensor dies, over temp ( outside normal design range ), etc.

I believe these sparkle codes are the chopper stabilized PGA oscillating until it returns stable.  Is there a specification for how long the PGA may oscillate?  

My firmware can detect the PGA saturation, and implement a "wait until stable" check for a work around.

Thanks,

Keith

  • 0
    TI__Guru* 98145 points
    Keith,


    It is possible that the PGA input can get saturated, or that the PGA become over-ranged so that it violates the output common-mode range of the PGA (as in over-ranging the output of one of the amplifiers).

    However, I'm not sure how that would manifest itself in "sparkle codes". Generally, I've seen these over-range conditions to behave moderately well in terms of holding a value. In this case, I think that the only problem would be a recovery time in the PGA after an overload condition.

    Can you please post a set of data that shows this condition? I'd really like to see the output data in hex (and not the converted data). It would be nice to know what the input is at the time (including the common-mode input voltage), the reference value, and then the set of data showing a sparkle condition and a non-sparkle condition.

    What data rate and PGA gain are you running the device in? How do you have your input set up? A schematic might be nice, but I'd settle for a basic description.


    Joseph Wu
  • 0 in reply to Joseph Wu
    Intellectual 270 points
    Hi Joseph,

    Thank you for replying so quickly. I ran a sparkle code scan over night, after I suspected the PGA might be overloading with the input set to system monitor external Vref setting ( ADC input Vref / 4 ). The sparkle code still happened.

    So the ADS1148 setup is as follows:
    2000SPS
    VBIAS Disabled
    INT Vref Always On
    REF1 selected as ADC reference - 2.048V external
    SYSMON_REF1 selected as ADC Input ( To debug if it was internal or external signal, and to prevent PGA from overload. Normal case is differential input pairs from the input mux )
    PGA Gain = 1 ( only for debug ) normal case is PGA Gain = 64

    Can we discuss this via email for scope traces, data, and schematic portions?

    Thanks,
    Keith
  • 0 in reply to R. Keith Montgomery
    TI__Guru* 98145 points
    Keith,


    If you want I can contact you through your email and we can start a dialogue on this issue. I'll send you something later this morning.


    Joseph Wu
  • 0 in reply to Joseph Wu
    TI__Guru* 98145 points
    This issue has been resolved offline. It looks like there were some timing issues between writing to the control registers and the START pin activation. Regardless, the data looks to be correct after a running a significantly long sample.


    Joseph Wu