ADC3222 Custom pattern questions

Hi
Let me question about 3 in ADC3222, please.

Q1:
The custom pattern isn't output from CHA at present.
Please tell me the way which outputs the custom pattern from CHA.
I'm thinking by the next procedure.

1. address 0Eh = bit[7:0]にCUSTOM PATTERNを設定
2. address 0Fh = bit[7:4]にCUSTOM PATTERNを設定
3. address 09h = 02h (Test pattern aligned)
4. address 0Ah = 06h (Custom pattern)
5. address 06h = 02h (Test pattern enable)

Q2:
Digital ramp doesn't move as the specification.
1LSB increment is being done every 4CLK cycle at present.
( [address 0Ah 3-0]: It's set as 0100.)

Q3:
Doesn't description of page54 make a mistake in a data seat (SBAS672A)?

”FLIP BITS : 1= MSB comes out first, sequence is 13,12,11, and so forth.”
ADC3222 is 12Bit, so I think "11,10,9" is right.

Best regards

Hi Cafain,

Sorry for the delay.

I will respond shortly.

Ken.

Q1 - Custom pattern can be initiated as per your process. The only issue I can see is that the register 0Ah should be 05h (custom pattern) instead of 06h (deskew).

Q2 - That is a known error in the data sheet - it will be updated in a future data sheet release. The ramp generator is actually an MSB aligned 14 bit ramp generator. It counts the clocks using a 14b counter so it will still wrap after 16384 clocks. Since only the 12 top bits are used, it would only toggle 1 step after 2 bits or 4 counts.

Q3 - The functionality of this bit is also mis-labeled. It should be flipwire. This bit flips the data on the output wires. Valid only in two wire configuration.
0 = Default
1 = Data on output wires is flipped. Pin D0x becomes D1x, and
vice versa.

Default condition has Dx0=bits[0..5], Dx1=bits[6..11]. With Flip Wire =1, the output becomes Dx0=bits[6..11], Dx1=bits[0..5]

Ken