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DAC101C085 SDA/SCL input signal rise-fall time

Kazuya Nakai59
Guru 21595 points
Other Parts Discussed in Thread: DAC101C085

 Hello guys,

 Our customer would like to know what is the minimum/maximum time of DAC101C085 SDA/SCL input signal rising/falling.

 I checked the device datasheet. Then I found several parameter names about SDA/SCL rise/fall time on page 9.

 But I have a few questions about the parameters.

 Q1. Are parameter trDA/tfDA/trCL/trCL1/tfCL for input signal or output signal?

 Q2. If the parameters are for input signal, what is rise/fall time of SDA terminal in output mode? (I think it depends on pull up resistor value.)

 Q3. Our customer uses the fast mode of I2C and open drain buffer to driver SDA/SCL bus. According to the datasheet, in case of the fast mode,

        SDA input signal rising time must be between 20 + 0.1Cb ns (min) and 300ns (max),

        SDA input signal fallng time must be between 20 + 0.1Cb ns (min) and 250ns (max),

        SCL input signal rising time must be between 20 + 0.1Cb ns (min) and 300ns (max),

        SCL input signal fallng time must be between 20 + 0.1Cb ns (min) and 300ns (max).

        Our customer controller controls DAC101C085 SDA/SCL using open drain buffer.

        No any other I2C device is connected to the I2C bus. Their current SDA/SCL falling time is about 10ns.

        Do they need to add some capacitance to reduce the falling time to meet the datasheet value?

 Your comment would be much appreciated.

 Thank you and best regards,

 Kazuya Nakai.

  • 0
    TI__Genius 16890 points

    Hello,

    A1:  trDA and tfDA apply to both input and output signals, trCL, trCL1 and tfCL are for an input signal.

    A2:  It will depend on the bus capacitance and the pull up resistor.  See page 25 of the datasheet:  Pull-up resistors (Rp) should be chosen to create an  appropriate bus rise time and to limit the current that will be sunk by the open drain outputs of the devices on the bus. Please refer to the I2C™ Specification for further details.

    A3:  You can increase the size of the pull up resistor.  This will increase rise and fall time.  There is a graph (Figure 41) in the I2C spec showing the relationship between the bus capacitance and the pull up resistor. 

    Mike