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ADS1115-Q1: Question about conversion time

Other Parts Discussed in Thread: ADS1115-Q1

Dear team,

we have some questions about the ADS1115-Q1 in it's internal structure.

About the setup: The ADS will be used with the maximum sampling rate (860 SPS), reading the two differential channels (AIN0-AIN1 and AIN2-AIN3) alternatively one after the other. Operation is in power-down single shot mode, because the conversion timing is controlled by the SW.

Could you give us some details about the conversion time of the device?
For example: Is it the time between the I2C ACK bit when the configuration is written (OS set to 1) and the first bit of the conversion register read-out? 

It would be important that we know how long the data are present in the conversion register, in order to optimize the sequencing.

Thank you very much and best regards
Martin

  • Hi Martin,

    The value of 860sps is based on continuous conversion mode.  When using the device in single-shot mode, the device is powered down so additional time is required for startup of the oscillator and internal circuitry settling.  This will be approximately 110us following the completion of the configuration write (last ACK).  The data rate can vary by as much as 10%, so worst case would be about 774sps (approximately 1.3ms).  If running strictly by time I would give some additional wait time (beyond 1.3ms + 0.11ms) to 1.5ms for complete conversion time.

    If writing the new configuration and then reading the old data is the procedure flow, then you must make sure that all data is read by the fastest timing possible which would be about 1ms.  This will avoid any data overwrite of the results.

    Best regards,

    Bob B

  • Hello Bob,

    thank you very much for the detailed answer. Exactly what we needed!

    Best Regards
    Martin