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Configuring PGA on ADS1298 using write registers opcode

Conrad Holt
Prodigy 140 points
Other Parts Discussed in Thread: ADS1298

Hi all,

We're designing an EEG device. and we have two ADS1298 one used for reading impedance and the other one for eeg signal reading.

When configuring the gain for the impedance ADC I have issues seeing results.

In my reading data method I have a buffer that parses the result once processed from the SPI (for each channel there's 3 Bytes and later I build a 16 bits variable for the total result). It seems that no matter what gain I fix in the init method the buffer always shows the same value.

Here's how I change the gain using the register write command WREG as seen in datasheet and in previous Questions here in the E2E forum:

imp_spi_buff[0] = 0x45;
imp_spi_buff[1] = 0x07;
imp_spi_buff[2] = 0x10;
imp_spi_buff[3] = 0x10;
imp_spi_buff[4] = 0x10;
imp_spi_buff[5] = 0x10;
imp_spi_buff[6] = 0x10;
imp_spi_buff[7] = 0x10;
imp_spi_buff[8] = 0x10;
imp_spi_buff[9] = 0x10;
imp_spi_buff[10] = 0x10;

imp_write_config_adc(imp_spi_buff, 11);

I use the same system to set HR mode and normal electrode for all channels and it works (I've checked the sampling rate with an oscilloscope and it samples at 500SPS, which means 0x86 on the CONFIG1.

I don't know what i might be doing wrong.

sincerely,

Conrad Holt Mestres 

  • 0
    TI__Mastermind 38745 points
    Hey Conrad,

    The values you have there seem to be correct to set all the channels to a PGA gain of 1. Can you send me an oscilloscope screen capture of the SPI transaction where you try to write those registers and in fails?

    Regards,
    Brian Pisani
  • 0 in reply to Brian Pisani
    Prodigy 140 points

    Hey Brian,

    So yesterday I decided to initialize first the ADC for measuring impedance instead of initializing first the one for eeg reading. 

    This is what i do when I initialize: 

    1) RESET setting pin low and pin high.

    2) SDATAC stop read data continuos mode

    3) CONFIGURATIONS

    4)RDATAC read data continuos mode

    5) I check that the status byte is correct 

    6)STOP

    6)SDATAC

    The reset pin is shared among the two registers which means I only do one reset in the first ADC init, also the clock is shared.

    It seems that if I do the all this steps first with the impedance ADC then the gain will change as well as other configurations will change. But if I do first the EEG ADC initialization, then the gain for the impedance ADC will not change. 

    I'm afraid that because of sharing the CLK and the RESET i will not be able to configure the two ADC's separately.

    What I've got so far is:

    I first initialize the impedance ADC (doing the reset), then I send the SDATAC command and after I configure all the registers, I don't do the check status reading for the impedance ADC. Then i Initialize the eeg ADC as explained before.

    Do you think that because of sharing the same clock and reset will be an issue? 

  • 0 in reply to Conrad Holt
    TI__Mastermind 38745 points
    Hey Conrad,

    I don't think sharing a clock and reset will be an issue, but sharing a SPI bus might be if not done carefully. Can you send me your schematic as well as the scope images?

    Regards,
    Brian Pisani