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ADS1259 SPS Time Does Not Match _DRDY_ Time

Dana Schwanke
Prodigy 20 points
Other Parts Discussed in Thread: ADS1259

I am currently working on a project where we are using multiple ADS1259 that must be communicated with over multiple isolation barriers.  At the moment, I have all of them configured for 50 SPS mode.  When using an oscilloscope to measure the time between START calls and when the _DRDY_ signal is pulled low, the _DRDY_ line is staying high for 40 ms at a time rather than the 20 ms I am expecting (1000 ms / 50 samples = 20 ms / sample).  I have looked through the data sheet numerous times, but I have not found anything that would explain this behavior.  Below is some pseudo-code of how the chips are being used an initialized:

Send SDATAC opcode

Send WRITE REG opcode

Send 0x02 // write all 3 registers

Send 0x04 // No SPI timeout, Internal Reference enabled

Send 0xD8 // Out of range and checksum enabled, use sinc2 filter, external reference, no START delay

Send 0x12 // SYNCOUT disabled, Pulse control mode, 50 SPS

Send READ REG opcode, send 0x02 // Read back what we wrote

Send 3 empty bytes

Compare what was read to what we wrote to confirm configuration is correct

Send START command

Check back every 20ms

If _DRDY_ == 0, read conversion and send another START command

  • 0
    Prodigy 20 points
    After a lot more digging, I finally found the answer to my own question. It was not in the section I had expected it to be ("DIGITAL FILTER") where it states that "The output data rates are identical for both sinc^1 and sinc^2 filters." It was under "CONVERSION SETTLING TIME", where it specifies that if you're in Pulse Control mode and using the sinc^2 filter, conversions do not show as "ready" for twice as long as you would expect. This does not happen in Continuous Conversion mode or with the sinc^1 filter.
  • 0 in reply to Dana Schwanke
    TI__Mastermind 44680 points

    Hi Dana,

    Welcome to the TI E2E Forums!

    I'm glad you found the answer to your question...In general, the first conversion result can be delayed for a couple of reasons...

    • Filter settling
      SINC filters are related to moving average filters that collect a certain number of samples and calculate an average. When starting a new conversion the filter values are reset and the average result will be inaccurate until the filter has collected all the samples used for the average calculation. Therefore, a SINC2 filter will require 2 conversions to complete before the result is accurate (SINC3 require 3 conversions, etc...). For every conversion thereafter, the filter will output data at the "data rate" (calculating the "moving" average), unless the filter is reset, like in pulse conversion mode.
    • Calibration math
      Additionally, there may be some some delay for the ADC to perform the calibration math to remove the offset and gain error from the result. This delay is only visible for the first conversion result, because for all following conversions this math function is performed in parallel with the ADC conversion process (like a pipeline architecture). This delay is fairly small, and usually observable at the faster data rates.

    I agree that the settling time information probably ought to be a part of the digital filter section in the datasheet...thanks for that feedback!

    Best Regards,
    Chris