SPI Serial Data Output (SDO) has a Long Rise Time

Grant E Pitel

Other Parts Discussed in Thread: ADS8332, ADS8331

I am interfacing an ADS8332 to a TI DSP over the SPI line. All my data signals look alright except the adc data output line (SDO). The attached waveform, labeled CH2 (blue), illustrates the problem.

All the SPI pins on the DSP have their internal pull-ups enabled. Thanks for the help.

CH1: CLOCK, CH2: SDO, CH3: SDI, CH4: CS

waveform

over 15 years ago

0 Tom Hendrick over 15 years ago

TI__Guru**** 180741 points

Hi Grant,

That long tail on the end of SDO is the part turning off its output driver. When /CS goes high, the SDO goes tri-state. The internal pull up on the DSP is bringing the SDO line high. This looks 'normal' to me, are you having trouble reading data otherwise?

0 Grant E Pitel over 15 years ago in reply to Tom Hendrick

Intellectual 650 points

I disabled the internal pull ups on the DSP. In all the example SPI wave forms, SDO and SDI are normally low. That fixed the problem.

Since I have your attention I have another problem I hoped you could help me answer. I think I have communication working with the adc. When I read back the adc's command register, it echos back the correct value. However, the software reset bit (last last bit which is normally one) is zero. The waveform on the oscilloscope also confirms this state. I was expecting it to be in normal operation (set to one). Thanks for you help.

~Grant

0 Tom Hendrick over 15 years ago in reply to Grant E Pitel

TI__Guru**** 180741 points

Hi Grant,

Can you post a picture/screen shot of your READ CFR command with the SDO/SDI and /CS lines?

0 Grant E Pitel over 15 years ago in reply to Tom Hendrick

Intellectual 650 points

Thank you for looking into my problem Tom. I have posted my waveforms below, including the value read in CCS. Sorry for the poor resolution....working over the boss on getting a better scope of this project.

0 Grant E Pitel over 15 years ago in reply to Grant E Pitel

Intellectual 650 points

I have tested read from CFR on two chips. Both return the same result.

Under what conditions is the bit reads zero? In the datasheet it states teh following

The CFR default value for each bit is '1'. The default values are applied to the CFR after issuing command 1111b or when the device is reset with a power-on reset (POR), software reset, or external reset using the RESET pin (see the Reset Function section).

Software reset can be used to place the converter in the default mode by setting the CFR_D0 bit to '0' in the Configuration register (see Table 5). This bit is automatically returned to '1' (default) after the converter is reset. This reset method is useful in systems that cannot dedicate a separate control signal to the RESET pin. In these situations, the RESET pin must be connected to VBD in order for the ADS8331/32 to operate properly.

0 Tom Hendrick over 15 years ago in reply to Grant E Pitel

TI__Guru**** 180741 points

Hi Grant,

Sorry for the delay in getting back to you. SDI/SDO data should be valid on the falling edge of the SCLK, I believe the trailing zero you are getting is actually a '0' forced out of the ADC after the completion of the data transfer (please refer to Figure 3 on page 9 of the data sheet.). What values are you trying to send to the CFR? The response, if data were shifted one bit left, from your CFR looks like it is actually 0x73F.

How do you have your SPI port configured? With a high dwelling SCLK, the 'phase' relationship should be set to '0', meaning data in and out of the device is valid on the first active (i.e. falling) SCLK edge. With a low dwelling SCLK, change the phase to '1' so that data is still valid relative to the falling SCLK edge.

0 Grant E Pitel over 15 years ago in reply to Tom Hendrick

Intellectual 650 points

Mike,

Thank you for pointing me in the right direction. I looked at the datasheet, which showed a SPI clock that is normally low. I change the polarity bit on the DSP CLK (similiar to what was done for the CS) and now I get the results I expected. Thank you for taking the time to work through the problem with me.

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SPI Serial Data Output (SDO) has a Long Rise Time