SVGA display not working with DM6446 interfaced to THS8200

Hi Deepthi,

Can you describe the failure?  Is there no output at all?

How is the GIO3/LCD_FIELD_B0 bit being used and is this signal at a constant logic level?  Your dtg1_field_flip (REG36h) and dtg2_fid_pol (REG82h) settings require that this signal be at a logic low level for proper THS8200 field start up.

It appears that you are also setting up the internal color bar pattern.  Is failure occuring when trying to generate the internal color test pattern, or when the DM6446 is sourcing YCbCr data.

Hi Larry,

Thanks for your quick replay

Right now we have pulled GIO3/LCD_FIELD line to ground in the hardware, what do we need to do program 0x36 reg.0x82

  Yestruday I had typed it half by miskate I clicked on Post so complete query didnt posted, after that I posted the quirey again completly.I think that is not moved to forum.

Please find my quiery below in detail..

   We are having a custom board in which DM6446 is connected to THS8200 to get SVGA display on monitor.

16bit YCbCr is interfaced to THS8200  with FID pin connected to GIO3/LCD_FIELD_B0.Color space conversion is enabled since YcbCR to RGB conversion is required and I have programmed the color space convesion registers withe values specified in the "CSC configuration example: HDTV YCbCr to HDTV RGB"

Is it ok or do we need to calculate seperatly for SVGA.

Register programmed values are

 Iam sending sendiong display image through DM6446.For 60Hz frame rate frequency I have reduced the DDR/VPSS clock  to get 40MHz clock.

With these I could able to see the Hsync,Vsync and  data coming out to VGA monitor but no display on the screen, so times amplitude of data is variying up to(0.7 V to 1V).But montor power light is on.

Right now FID pin is grounded since Iam disableing DE in register 0x82(value=0x59).Is this correct?

Even I tried to display color bar by programming above values, but still no display on monitor.

PLease help me out in resolving this issue

 Regards

Deepthi

Deepthi,

When using discretes with the FID input pulled low, use dtg1_field_flip = 1 (REG36h=80h).

The REG82h setting depends on sync polarites.  SVGA60Hz required postive output syncs.

If the DM6446 is outputting postive HS and VS, try REG82h=1Bh.

If the DM6446 is ouputting negative HS and VS, try REG82h=18h.

What are the output sync amplitudes?  I have seen some designs use VDD_IO=1.8V and drive the monitor directly with 1.8V syncs.  This will not work with most monitors. 

If the syc amplititude are OK, I would check the THS8200 output sync frequencies.  For VESA DMT SVGA60, HS=37.879 KHz an VS=60.317Hz.  If the sync frequencies, polarities, and widths are correct, the monitor should detect and lock to SVGA60.  Any RGB present at the DAC outputs should be visible on the display.

Internal color bar generation requires a different type of setup.  I would focuc on normal operation for now, check the syncs, and also look at the RGB ouputs relative to HS to confirm that the DACs are functioning.

The same YC>RGB CSC settings in the datasheet should work for all graphics formats. 

Thanks Larry,

   Now Iam able to get display on Monitor. But only blue component is getting displayed.

We have connected THS7303 amplifier to THS8200 and RGB o/p from amplifier is connected to monitor.

We have programmed amplifier with 0x94 for all channels.but if we probe on CRO we are getting signals only  on channel 1.

default state on this channel is high where as on other two channels it is low.

What can be the reason for this. we are sending 0 pattren before programming amplifier as per the data sheet.

we have connected 2.2K pullup on I2C lines.

Please help us to resolve this.

Thanks and Regards

Deepthi Kiran

Deepthi,

The THS7303 DS also recommends using an RC filter circuit (100-ohm / 22pF) on SCL and SDA for noise immunity.  I think there is a potential I2C issue if this is not done.

Are you able to read the 3 channel registers to see if all 3 have been programmed?

Are you using AC or DC coupling?

I would also check the DAC ouputs prior to the THS7303 to make sure this is not THS8200 related.

The THS8200 will need 37.5-ohm load resistors on the DAC ouputs when used with the THS7303, since the THS7303 has high impedance input.  This would effect all 3 channels, however.

Regards,

Larry

Thanks Larry  for  your good support.

Now after putting RC filter Iam able to get the display properly.

But instead of white Iam getting Yellow patchs on white.What can be the issues.

I have enabled color space conversion by programing the register values as below

0x04-   0x81     
0x05- 0xd5     
0x06-  0x00    
0x07-  0x00    
0x8-   0x06     
0x9- 0x29     
0xa-   0x4     
0xb- 0x00       
0xc-  0x04     
0xd-  0x80     
0xe-  0x4      
0xf-  0x00     
0x10- 0x80     
0x11-   0xbb   
0x12- 0x07     
0x13-   0x42   
0x14-  0x00    
0x15-  0x00    
0x16-  0x14     
0x17-  0xae  
0x18- 0x8b     
0x19-  0x14   

These values I got it from data sheet.They have mentioned there as HDTV YcbCr to HDTV RGB.Is this fine ?

Thanks and Regards

Deepthi Kiran

Deepthi,

Are you still having the color issues?

Can you describe the test pattern being used and color patches you are seeing?  Do the color artifacts appear throughout the pattern or just after video edge transitions.

CSC settings could affect overall color but should no cause color patch artifacts.

Regards,

Larry