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ADS 5474 Spurious-free dynamic range

Minghui Shi
Prodigy 10 points

Hi,

I had a question while reading the spec sheet of ADS 5474. This ADC's SFDR for F_IN = 30MHz is specified to be 88 dBc. I am wondering how this 14 bit ADC can go over 84 dB, which is supposedly the maximum SFDR you can have.

Could you explain this?

Thanks!

  • 0
    TI__Guru* 97465 points
    Minghui,


    I'm going to move this post to the High Speed Data Converter Forum where this product is supported. I'm sure you'll be able to get an answer here.


    Joseph Wu
  • 0 in reply to Joseph Wu
    TI__Mastermind 29220 points

    Hi,

    you are thinking of the quantization error limit on signal to noise ratio (SNR) which is limited by 1.76 + 6.02 * bits_resolution.  For a 14 bit ADC, that would be 86.04.  Clock edge jitter and thermal noise further degrade achievable SNR.

    Spurious Free Dynamic Range (SFDR) for a single tone input is defined as the difference from the fundamental down to the highest spur which is often the 2nd or 3rd harmonic but which could be some other spur in the spectrum.  So for a full scale sine wave input, if the 2nd harmonic is the worst spur and is seen to be -90dB down from the input then the SFDR would be 90dBc.  

    Regards,

    Richard P.