Hi,
I'm using AFE5803 evm for my school project.
I set up my evaluation board just as mentioned on page 3/4 of the 5803evm guide, but with the following two differences:
- I connect Pin 1&2 of JP1. I think the pin configuration in figure 1 on page 3 might be wrong.
- I move JP9 to OSC 'cause i have no ADC clock generator in hand.
After powering up, the DC power says it overloads, then i cut off the power and find +5VA and GND of JP6 short-circuits.
In order to find out where the problem lies, I remove all the jumper caps and two ferrites (FB2/4), so the input power supply is completely kept apart with all the ICs, but the short-circuits still exists.
Does it means there must be some cracks or deformation inside the board between diffrent layers?
p.s.
another weird thing is, i find CLKBUF_VCC, the power supply of the clock synchronizer IC short-circuits with GND. and i find the VCO used with CDCM7005 on board conflicts with the one on the schematics (OSC1 on sheet 4 of the schematics) . It should be a 6-pin VCO but it's a 4-pin regular oscillator in fact. I'm very confused about that.
