LM98620 eval board schematic

Hi Syed,
Sorry about the delay. I hope to get back to you by tomorrow.

Regards,
Hooman

Hi Syed,
The LM98620 registers can be written in order from lowest to highest address. No other special sequence is required. After the initial configuration is done, then changes or trigger commands can be sent to enable specific black/white calibration features as needed.

Regards,
Hooman

Hi Hooman,

What is the timing for generating CLPIN & BLKCLP. Is it during the light shield output (blanking period) from sensor.

I have attached the timing chart of the CCD sensor I am using.

Regards,

Prasanna

Hi Prasanna

Yes, the CLPIN and BLKCLP inputs should be asserted during the Light shield output pixels.

Please refer to Figure 21 and Figure 24 and related text descriptions in the LM98620 datasheet.

Best regards,

Jim B

Hi Jim,

Thanks for your reply.
At present I have configured the AFE sample timing to SH1a mode. I have following questions
1. Do I have to still configure the DLL (position & width) or leave it at default values.
2. Do I have to provide external SHD/HOLD & SHP/SAMPLE or always drive them Low.

Regards
Prasanna

Hi Prasanna

For SH1a mode you can leave the DLL sample position settings at defaults.

You do not need to drive the SHD/HOLD or SHP/SAMPLE inputs. The sample and hold timing is driven from AFEPHASE internal timing signal.

I recommend you use a Pixel Rate input clock. Then the internal AFEPHASE timing is determined by the input clock and no other external timing signal is required.

Best regards,

Jim Bg

Can Hooman or anyone else re-share the schematics for LM98620 evaluation board?

Best regards.

Hello,

Here is the LM98620 EVM schematic and layout information:

1321.3580.0131.LM98620 EVM.zip

Note: The files containing "Des" in their file names are the deserializer portion connected to the LM98620 EVM output through a "daughter" board using J19 connector (on the LM98620 board) and J5 on the daughter board.

7/28/16: Note: Added BOM files to the zip file above.

1/12/17: Note: Added Gerber-like files in new folder labelled "Gerber Files 1_12_17"

 

Regards,

Hooman

Thank you very much Hooman, you are a lifesaver!
I need to ask for the BOM file (I could not find it in the RAR file), and of course the SensorEval software.

Thank you in advanced.

Hi,

I've added the two board BOM's to the original zip file (posted on July 25, 2016).

The SensorEval software can be downloaded off the web here:

Regards,

Hooman

Hello

thank you Hooman I find it in the updated file.

Best regards

Hello,

I've been told that there may be issues with using the SensorEval web installation file with the LM98620 (or LM98xxx devices in general).

Here is the installation file (along with instructions) of the version 1.1.5 that I run on my Windows 7 machine and it works:

SensorEval 1.1.5 AFE.zip

Regards,

Hooman

Hello,
Thank you again for your concern.
I need to ask you about the Gerber files, can you share them?
and if it possible to share the original schematic files in any format like (Eagle, Altium, Orcad).
thank you in advance for your cooperation.

Best regards.

Hello,

I'm sorry but I don't have the EVM Gerber files (*.gbr extension) or the source schematics.

I will ask other colleagues available next week, and if I am able to locate these, I'll post them to this thread.

Regards,

Hooman

Hello Hooman,

  Any good news?

I really in need for the EVM Gerber files or the source schematics, so please if it possible share them.

Regards 

Hi Mohammed,

I'm currently not in my office. I'll get back on Wednesday and I'll look to get you the gerber files you've asked for.

Regards,

Hooman

Hi Hooman,

  thank you in advance.

Regards.

Hi Mohammed,

I've uploaded whatever I had on this EVM that resembles Gerber files in the original location zip file:

3580.0131.LM98620 EVM.zip

Hopefully this is what you are looking for?

Sorry, I don't have anything else if this is not what you want.

Regards,

Hooman

Hi Jim,

1. When using black  level calibration (automatic method), CDAC and  FDAC enable mode should be used after power up calibration and FDAC only mode during normal scan operation. Is my understanding correct. Can Auto black loop Enable in register BLKCLP_CTL0 (0x23 bit 2) kept HIGH always.

2. When using white level calibration (automatic gain control), AGC_ON bit in register AGC_CONFG (0x28 bit 0) is set using serial interface(AGC_ONB is always HIGH. AGC_ONB polarity selected as active low). Should we write AGC_ON LOW from serial interface after white loop is complete or will it get cleared automatically after white loop is complete.

Regards

Prasanna

Hi Hooman,

Can you please clarify my above questions.

Regards

Prasanna

Hi,

Can anyone please help.

Regards

Prasanna