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DAC8568 - LDAC pin state and LDAC register when using software LDAC feature.

Christopher Berens
Prodigy 30 points


Hello! I am planning to use a command sequence similar to that shown on Page 41 of the datasheet.

I do not plan on connecting the LDAC pin to my FPGA. I'd like to write to data buffers A-G in sequence, then write to data buffer H and simultaneously update all eight DAC outputs. I don't want any of the outputs voltages to be updated until I have written all eight input registers.


My question is, when using the part in this mode, in which state should the LDAC pin be permanently tied, and do I need to write the LDAC register to 1s for all channels to override the LDAC pin state?


I get the impression that I can tie the LDAC pin high, leave the LDAC register in its default state of all 0s (meaning do not override, but the pin is high anyway), and then use the "software LDAC" feature as shown in the datasheet (Page 41, step 4) to update all DAC outputs.


Am I on the right track here?

Thanks!

  • 0
    TI__Genius 11750 points

    Hi Christopher,


    And welcome to the e2e forums.  You are indeed on the correct path.


    For your application it sounds like you can tie the external LDAC pin permanently high and invoke software LDACs through register writes.  Page 38 of the datasheet explains the functionality of the software LDAC register, but I have provided the paragraph below:

    "Alternatively, all DAC outputs can be updated simultaneously using the built-in software function of LDAC...If the LDAC register bit is set to '1', it overrides the LDAC pin and this DAC channel updates synchronously after the falling edge of the 32nd SCLK cycle"
    .

    The register information is included on page 35.


    Best Regards,

    Matt