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TI ad12j4000 EVM and Xilinx VC707

brian feng
Prodigy 180 points
Other Parts Discussed in Thread: ADC12J4000, LMK04828, ADC12J4000EVM

Hi,

Now ,I use TI AD12J4000 EVM ,TSW14J10 and Xilinx VC707 to verify JESD204B, But I encounter some problems.

The steps is below:

1. In EVM button of ADC12J4000 EVM GUI V1.3 , I select on board clock souorce,Fs= 1966.08Msps, Bypass mode DDR, and then program clocks and ADC.

2. In low level View , I set below:

0x201 : 0x0E

0x33 : 0xC7

0x30 : 0xC0

0x202 : 0x00

0X200 : 0x20

0x50 : 0x2E

0x201 : 0x0F

3. In Xilinx FPGA logic, I use jesd204 V6.2 ipcore , and set lane rate = 3.93216Gbps, LFK=884, core clock =98.304MHz, refclk = 98.304MHz, SYSREF = 12.288MHz. The clock frequency is also measured from the AD12J4000 EVM with oscilloscope .

With these setting ,I got wrong data as blow:

I know the data is wrong exactly, but I do not know why.

B y the way ,how does the data format in the Table12-13 of ad12j400 datasheet reflect to rxdata[255:0] in Xilinx IP core.

Thanks very much!

 

 

  • 0
    TI__Expert 4085 points
    Hi Brian,

    I'm moving your post to the correct forum.

    Best Regards,
    Julian
  • 0
    TI__Guru* 91947 points

    LMK04828_DB1_Fs_3100_3500Msps_VC707.cfgBrian,

    Are you using the provided firmware from HSDC Pro to program the FPGA? If not, please do and load the attached config file after program the ADC for bypass mode and sample rate of 3100Msps. I would suggest getting the hardware to work first with tested firmware and config files before trying something new.

    Regards,

    Jim

       

  • 0 in reply to jim s
    Prodigy 180 points
    Jim ，

    Thanks very much for your timely reply!

    I get you suggestion, but I have also some questions.
    1. In HSDC Pro, I got 4 firmware to program VC707 FPGA in folder of D:\Program Files (x86)\Texas Instruments\High Speed Data Converter Pro\14J10VC707 Details\Firmware. They are “TSW14J10_VC707.svf”, “TSW14J10_VC707_2_lane.svf”, “TSW14J10_VC707_v2p6.svf”, “TSW14J10_VC707_v2p7.svf”. which one is right. or is there other firmware? can you send me?

    2. The file of LMK04828_DB1_Fs_3100_3500Msps_VC707.cfg is just for config the LMK04828. Do I config ad12j4000 as well in LOW LEVEL VIEW of ADC12J4000EVM GUI V1.3. I just select “on board clock”, “Fs = 31000MSPS”, “bypassmode” in EVM. Is this right?

    3. In HSDS PRO, What I can do to verify the hardware of AD12J4000 EVM is OK?

    Thanks very much,

    Best Regards!

    Brian
  • 0 in reply to brian feng
    TI__Guru* 91947 points

    Brian,

    Use the latest version, which is v2p7. You will load the low level view of the ADC first, 3100MSPS, bypass mode, then load the LMK file. In HSDC Pro, select adc12j4000_bypass then set the ADC output data rate to 3100MSPS.

    Regards,

    Jim