Hello,
I am currently testing SPI between the PIC and the ADS1298ECGFEPDK and have run into a stand still. I've been able to verify, with the help of my professor, that the SPI lines from the PIC are correct. However, the moment we connect that to the SCLK line of the ADS1298ECGFEPDK on J3, the clock doesn't seem as clean. This is the same when we connect the SDO line of the PIC to the ADS1298ECGFEPDK as well. We were also checking the DRDY line and did not look clean either. Here are the current connections I have between the PIC and the ADS1298ECGFEPDK:
Pic's 5 V - pin 10 of J4
Pic's 3.3 V - pin 2 of J4
Pic's ground - pin 5 of J4
Removed JP24 - (This may be my problem as to not powering it well but I'm not sure)
I've connected the SPI pins (SCLK, DIN, DOUT, CS, START, RESET, and DRDY) on J3 to arbitrary pins on the PIC, as well as given PWDN an arbitrary pin. Keep in mind, that these issues we encountered were with the ADS1298ECGFEPDK not even connected to our waveform simulator, which leads me to believe that something else is going on. Also, we have set tclk to be 500 ns. Any suggestions? Attached also, is a link to the video where we look at the effects of the SCLK and SDO lines of the ADS1298ECGFEPDK on the PIC's SPI output. The code we were running was trying to go through the sequence outlined in page 85 of the ADS1298 datasheet.
Thanks,
Noel Teku
