ADC34Jxx : Interoperability of JESD for ALTERA FPGA

toshi-e2e

Genius 4830 points

Hi all,

Could you share the inter-operability test data between ALTEAR JESD IP and ADC34Jxx family?

Thanks in advance.
Toshi

over 9 years ago

0 Ken C over 9 years ago

TI__Genius 12965 points

Toshi,

We have worked with the FPGA vendors to perform interop tests, but we have only completed interop testing for 1 ADC and 1 DAC with the Altera IP. As the IP used in the ADC and DACs is re-used in different devices, it was felt that there was only a need to test 1 ADC and 1 DAC. Please see the following links for the Altera Interop tests for ADC and DAC.
http://www.ti.com/lit/slau540 ADC
www.ti.com/.../slau555 DAC
www.ti.com/.../pg_jesd204b-tools.html General 204B for Altera

We are constantly testing the IP when we connect our device EVMs to the TSW14J56 evaluation platform.

Ken

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ADC34Jxx : Interoperability of JESD for ALTERA FPGA