Dear Sir/Madam,
I am currently designing a 128 Ch. Digital Rx which has 16 No.s ADS5294(octa-ch. ADC) interfaced with Xilinx Virtex-7 FPGA. I am planing to evaluate all my ADC performance using a TI tool i.e., HSDC Pro. But this current process of importing the digital data into HSDC Pro gets very tedious if i have to test all my 128 ch. ADC(4 such Boards => effectively 4 X128 = 512 ch. to be tested).
If a Ethernet interface(preferably UDP protocol) is provided to the tool then that can reduce the time to test significantly. Kindly do need the needful.
Thank you in advance.
Regards,
Arun.