ADS 1271 SPI mode issue

We are interfacing ADS1271 to a Spartan 6 Lx150 FPGA  through a digital isolator MAX14934, Clk used is 27 MHz. We are dividing it internally on the FPGA an generating 27/16-=1.6875 Mhs as SCLK to the FPGA. What we are observing chipscope is we take say 100 sample we get some of the data with MSB shifted. We have spent some time solving this issue but it seems to have come back with a vengeance. We can upload the interface RTL if required.Also if a standard interface code is available as a pointer, it would be very helpful.