This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Clock and data rates for ADS1248

Other Parts Discussed in Thread: ADS1248

Hi I would like to run the ADS1248 at a sampling frequency other than the frequencies specified in the datasheet. There is a register you can configure thatIf you run the external clock it says:

DOR3:0
These bits select the output data rate of the ADC. Bits with a value higher than 1001 select the
highest data rate of 2000SPS.
0000 = 5SPS (default)
0001 = 10SPS
0010 = 20SPS
0011 = 40SPS
0100 = 80SPS
0101 = 160SPS
0110 = 320SPS
0111 = 640SPS
1000 = 1000SPS
1001 to 1111 = 2000SPS

This is for an external clock around 4mHz, however the range of fosc is 1 to 4mHz, if I ran it at 3 mHz could I get a rate that's different then the rates specified here, or would it be the same?

  • Steven,

     

    The stated data rates are for a 4.096MHz clock.

    If the master clock used is 3MHz , then the data rates will basically be 3/4 of that listed (scaled by the master clock rate).

     

    Joseph Wu

  • If  I do run the clock at 3MHz does this change the way digital filtering works? Would figure 34 to 39 look approximately the same as they do there? Or will they be somewhere in between?

     

     

  • Steven,

     

    The filter frequency response plots of Figures 51 to 61 also change with the clock rate and will scale directly with the master clock. They will look approximately the same with amplitude, but will be scaled in frequency. It is noted in the text that the filter plots are generated with a 4.096MHz clock.

     

    Joseph Wu

  • Could I get a different rate by using the START pin? I'm looking for something along the lines of 60SPS

  • Steven,


    You can do something like that. In that case, you would have to run the part at a faster speed and then run the conversion, once that is finished, then you would wait until the desired time to start another conversion. This would be a little harder to do, but it would get you data every 16.66ms (60Hz)

    For example. Start the part converting at 80SPS, after 12.5ms you can clock out the first data. 4.166ms after that you can pull START low and then back high (or run a SYNC command) and 12.5ms after that you should have another piece of data to collect. You can repeat this START or SYNC 4.166ms after the last DRDYn indication.
    You would get a new piece of data every 16.66ms (for simplicity, I'm ignoring the time it takes to collect the data or the time it takes to pull start low).

    If you have the option it's easier to run it continuously with a 3.072MHz clock. In this way, you set the part in 80SPS mode. Since the master clock is slower than the listed 4.096MHz, then the 80SPS mode becomes 80*(3.076/4.096) or 60SPS.


    Joseph Wu