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Software pacemaker detection reference design (question about parameters value of simulation)

Other Parts Discussed in Thread: ADS1298R

Hi!

I have a question concerning the “Software Pacemaker Detection Reference Design” (http://www.ti.com/lit/ug/tidub75/tidub75.pdf) .  The section 4 ,in which explains the simulation schematic of the circuit, we see following statement:

“The PGA’s frequency response had to be approximated using RC filters formed by R13,R14,,C1,,and C2-“

According to the values for resistor and capacitor in the simulation (2,5k for resistor and 636,5p for capacitor), this gives us the bandwidth of around 100kHz.

However, in the datasheet for ADS1298r; there is a table shows the PGA bandwidth. (for gain 12 we have 32 kHz)

I wonder why in the simulation (for software pacemaker detection) the bandwidth of 100 kHz is specified for  PGA with gain 12?

Or Do I calculate/consider something wrong?

Thanks in advance,

Mina

  • Hello Mina,

    It looks like you've uncovered an error in the design document! You're correct, I (the author of the document and circuit designer) placed the wrong RC value following the amplifier in the model for the PGA for the given gain. I opened up the simulation file and adjusted the capacitor values to 2 nF to give the PGA circuit a -3dB cutoff frequency of 31.8 kHz. Upon simulating the transfer function of the entire circuit, I found a new upper bound of 18.7 kHz. This is in contrast to the 24.4 kHz cutoff found in the previous simulation.

    Note that in the results section of the document, I describe the test circuit as having used the gain of 12. I was subsequently able to see the pacemaker signal in the actual setup. In fact, I tend to think that the decrease in bandwidth is an improvement in the design. 24 kHz may actually be too wide of a bandwidth given we are sampling at 32 kHz. The lower bandwidth allows for less noise aliasing and therefore less uncertainty in an algorithm that scans the signal for a pacemaker.

    Any thoughts?

    Regards,
    Brian Pisani
  • Hi Brian,

    Thanks for the quick reply. Yes, you are right . In this system, either making the ADC samplig frequency higher or making the -3dB cut-off frequency lower will let less noise alliased back. By 32kHz sampling frequency ( the nyquist frequency of 16 kHz),I think, it will be better if the cut-off frequency set lower than 18.7 kHz.

    BR,
    Mina