Other Parts Discussed in Thread: DAC3484
Hello .
I am trying to give out a 5MHz sine wave through a DAC3484 using LUTs in FPGA .
I have completed the pattern checker test and programmed the input clocks and DAC clock such that no FIFO collisions occur . I am using the Single Sync Sources Mode
I have disabled PLL , QMC , NCO , Mixer and am not even doing coarse mixing . I just want to observe a peak at 5 Mhz in the Frequency spectrum when I send out the Sine wave .
But , FIFO collisions start to occur when I disable the Synchronization source to the FIFO (config32 = 0x0001) . So , I dont disable the synchronization to the FIFO or to the clock divider synchronization (which also creates FIFO collision when disabled) and just try to observe output by enabling sif_txenable .
Is there anything wrong in what I am doing above ? Might there be any other reason to why I am not observing the correct output waveform ?
