I'm planning to connect the SPI bus from my ADS1278EVM to an FPGA board but I'm concerned about signal integrity when sending MHZ fast CMOS 3.3V signals over a ribbon cable or maybe vie flying leads. I know I'll want to keep these short and may want ribbon cable with a lot of GND wires or shielding. I'm hoping someone has cleared this hurdle and can share the experience. My first choice was to use TDM mode to reduce the number of DOUT signals but I'm thinking that the speed of the signals drives me to NOT use TDM and pray that I can get adequate signal integrity with about 4 MBPS data on 4 or maybe 8 of the DOUT signals. I'm likely to be using high speed mode with an A/D clock frequency around 32MHz, fDATA ~126,000/s. The FPGA board will be a Xilinx 7 series, probably the ZED board with a ZYNQ capability. It appears o have good options for ribbon cable usage. I expect I can command an FPGA port to use CMOS 3.3V.
What would be very nice is if the ADS127x converters could be had on a board that already mates with one of the Eval FPGA boards I'm purchasing.
Thanks for reading.
