how to config total bit /control bit of ads54j60 ?

i use example designe of xilinx kcu105 .  when  the kcu105 receive CGS and send a high sync signal to ADC .   i  use AXi lite  to  read  config data from ILAS ,  the register is  0x810 and corresponding data is 0x000f0d .  in the xilinx  pg066-jesd204.pdf   , the register 0x810   represent   :

31:26 – Reserved
25:24 00 CS (Control bits per Sample)
23:21 – Reserved
20:16 00000 N' (Totals bits per Sample)
15:13 – Reserved
12:8 00000 N (Convertor Resolution)
7:0 0x00 M (Convertors per Device)

so  0x000f0d01  means    2 converters   ,14bit resolution , 16 total bit  ,  zero control bit  .

but  i  think  total bit should  equals  resolution bit +  control bit  .   why ??

is the adc send  wrong  parameter  in  ILAS procedure , and  how to control the  parameter  ,  i  can't search  and register  about control bit in  ads54j60 datasheet .