Providing single ended signal to vcxo_in in dca5681z evm

yogesh tripathi

Other Parts Discussed in Thread: DAC5681Z

Hi,

I haven't installed vcxo to the evm. I applied a 200mhz clk from my artix 7 kit io pins . As given the vcxo_in signal should be 1vpp with 0 volts dc, so i applied a voltage divider. but the evm is detecting the clock only at 3.3v peak to peak not less than it.

What could be the reason and is it safe to apply 3.3vpp to vcxo_in?

over 9 years ago

0 Neeraj Gill over 9 years ago

TI__Mastermind 20541 points

Hi Yogesh,

In section 4.6.1 of the DAC5681z users guide we recommend to use an external sine wave source with a 1-Vrms, 0=V offset on SMA J6. 1-Vrms is equal to 2.825-Vpp and 1Vpp is equal 0.354Vrms which is not enough amplitude. Below is the link to users guide.
www.ti.com/.../slau236a.pdf

You can use following link convert between dBm, watts Vrms,Vp and Vpp. for sine signals in 50-Ohm systems.
ifmaxp1.ifm.uni-hamburg.de/DBM.shtml

Regards,
Neeraj Gill

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Providing single ended signal to vcxo_in in dca5681z evm