I've been struggling for the past week with an issue where I've been attempting to get a DAC3171 working in DDR mode with an Artix 7 FPGA. The DAC appears to be rejecting the lower 7 bits. While going through the registers with a fine-tooth comb, I noted that the readback after power-up on register config 6 (0x06) is reading back 0x0090 instead of 0x0010 as it should for a DAC3171. The fact that bit 7 is set, according to page 43 of the latest datasheet, indicates that the device is locked to use only 14-bit full interface mode, and can't be configured to use the 7-bit DDR interface mode. The other registers read back properly, so I'm pretty confident in my SPI interface reading the register correctly.
I can't find any reference to there being a version of the DAC3171 that only supports 14-bit mode, but the device I have certainly seems to be fused that way, and is acting like it. Is it possible that that fuses were mis-programmed from the factory for this batch???