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ADS8363 pseudo-differential , M0 = 0, M1 = 0, CHAx and CHBx value issue.

Iron Huang
Prodigy 70 points
Other Parts Discussed in Thread: ADS8363

Hi there,


I am using ADS8363 to get 2 channel voltage value in same time, so I put a voltage to this 2 channel but there are 0x8000 between CHAx and CHBx. The configuration is as following.

using External reference :

CONFIG = 0x106C
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1 = 4 x 2 pseudo-differential operation.
bit[5] , CID = 1 = Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = 1100 = Write to REFCM register with next access.
 
REFCM = 0x0000
bit[15:8] , CMxx = 0 = external common-mode source through CMx (CMA = CMB = 2.5V)
 
CONFIG = 0x1062
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1= 4 x 2 pseudo-differential operation.
bit[5] , CID = 1= Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = x010 = Write to REFDAC1 register with next access.
 
REFDAC1 = 0x07FF
bit[10] , RPD = 1= The internal reference path is disabled
 
CONFIG = 0x1065
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1= 4 x 2 pseudo-differential operation.
bit[5] , CID = 1= Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = x101 = Write to REFDAC2 register with next access.
 
REFDAC2 = 0x07FF
bit[10] , RPD = 1 = The internal reference path is disabled

using internal reference :

CONFIG = 0x106C
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1 = 4 x 2 pseudo-differential operation.
bit[5] , CID = 1 = Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = 1100 = Write to REFCM register with next access.
 
REFCM = 0xFF00
bit[15:8] , CMxx = 1= internal common-mode source = REFIOx, depending on settings of bits Rx[3 :0]
RBx[7:4] = 0000 = internal reference source REFIO1 selected.
RAx[3:0] = 0000 = internal reference source REFIO1 selected.
 
CONFIG = 0x1062
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1 = 4 x 2 pseudo-differential operation.
bit[5] , CID = 1 = Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = x010 = Write to REFDAC1 register with next access.
 
REFDAC1 = 0x03FF
bit[10] , RPD = 0 = Internal reference path 1 is enabled and the reference voltage is available at the REFIO1.
 
CONFIG = 0x1065
bit[13:12] , R[1:0] = 01 = Update of the entire CONFIG register content enabled.
bit[6] , PDE = 1 = 4 x 2 pseudo-differential operation.
bit[5] , CID = 1 = Conversion data or register content is present on SDOx immediately after the falling edge of RD.
bit[3:0] , A[3:0] = x101 = Write to REFDAC2 register with next access.
 
REFDAC2 = 0x03FF
bit[10] , RPD = 0 = Internal reference path 2 is enabled and the reference voltage is available at the REFIO2.

The result is :

17:16:50 CHA0(CHA0N)=37A0
17:16:50 CHB0(CHB0N)=B7A0
17:16:50 CHA0(CHA0N)=3934
17:16:50 CHB0(CHB0N)=B934
17:16:50 CHA0(CHA0N)=37F6
17:16:50 CHB0(CHB0N)=B864
17:16:50 CHA0(CHA0N)=33B6
17:16:50 CHB0(CHB0N)=B3B6
17:16:50 CHA0(CHA0N)=3834
17:16:50 CHB0(CHB0N)=B836
17:16:50

17:16:50 CHA1(CHA0P)=37C0
17:16:50 CHB1(CHB0P)=B7D0
17:16:50 CHA1(CHA0P)=38F0
17:16:50 CHB1(CHB0P)=B8F0
17:16:50 CHA1(CHA0P)=3480
17:16:50 CHB1(CHB0P)=B48A
17:16:50 CHA1(CHA0P)=38C8
17:16:50 CHB1(CHB0P)=B8CA
17:16:50 CHA1(CHA0P)=34AE
17:16:50 CHB1(CHB0P)=B4AE
17:16:50

17:16:50 CHA2(CHA1N)=377D
17:16:50 CHB2(CHB1N)=B7B5
17:16:50 CHA2(CHA1N)=3925
17:16:50 CHB2(CHB1N)=B925
17:16:50 CHA2(CHA1N)=35E5
17:16:50 CHB2(CHB1N)=B5F5
17:16:50 CHA2(CHA1N)=39C5
17:16:50 CHB2(CHB1N)=BA44
17:16:50 CHA2(CHA1N)=35A5
17:16:50 CHB2(CHB1N)=B5A7
17:16:50

17:16:50 CHA3(CHA1P)=3398
17:16:50 CHB3(CHB1P)=B398
17:16:50 CHA3(CHA1P)=3514
17:16:50 CHB3(CHB1P)=B554
17:16:50 CHA3(CHA1P)=3750
17:16:50 CHB3(CHB1P)=B754
17:16:50 CHA3(CHA1P)=3814
17:16:50 CHB3(CHB1P)=B814
17:16:50 CHA3(CHA1P)=35DE
17:16:50 CHB3(CHB1P)=B5FE
17:16:50

How to set it to get the value correctly for this ADC? Thanks!

BR,

Iron.Huang

  • 0
    Prodigy 70 points

    Hi all,


    Any update?

    Why Channel A and Channel B have 0x8000 deference when we just put the same voltage to Channel A and Channel B?

    BR,

    Iron.Huang

  • 0 in reply to Iron Huang
    TI__Mastermind 45085 points
    Hi Iron,
    I apologize for the delay, can you please upload your schematic here? more information will be helpful to figure out the reason, you are testing two different conditions: external voltage reference and external common-mode source, internal reference and common-mode source, what's your test signals and connections for each condition? what's the converted data for each? also can you measure the voltage on REFIO1 and REFIO2 when using internal voltage reference? thanks.

    Regards
    Dale Li