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Tying ADS8363 CS low for sequential reads

Other Parts Discussed in Thread: ADS8363

TI,

I'm writing for clarification on the CS functionality in the ADS8363.

The timing diagram on page 22 lists sequential reads with the CS pulled low the entire time.  However, I've been informed that the engineer using this device was having unexpected behavior when not toggling CS, and the behavior stopped when he toggled CS between reads.  I'm in the process of clarifying what exactly this unexpected behavior was, but while I'm doing that:

  • Can CS be tied low for the entire duration of a sequence of reads across all 8 channels of the device?  Is this only for half clock mode?

Thanks in advance for all of your help.

Aaron

  • Hello Aaron,

    Please provide any new information when available, especially about what the costumer is seeing and the configuration of the device in use, it would help greatly.
    There are different variables here that need to be considered, such as what mode is being used, and connections. Note that the pin description of CS states that SDO, SDI and RD are active when low, but ignored if high; also on page 17 under CONVST section, it explains that if CONVST and RD are connected together CS must be low when a new conversation starts, but this is not needed if RD and CONVST are not connected together.
    On another note, on page 28, under Read data, it is explained that if repeated read access occurs without a new conversion, expected behavior is different when using full mode of not. In full mode only the first read access shows the correct channel information, those following will be invalid, and will be corrected with the following conversation.
    As mentioned, more detail about what the issue would help.

    Thank you
    Cynthia