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ADC12J4000 decimate-by-8 does not seem to work

LeonardEllis
Guru 71526 points
Other Parts Discussed in Thread: ADC12J4000

I am using the ADC12J4000 with the VC707 and TSW14J10 Eval setup. Along with the GUI, I am able to get an effective signal processing using dec-by-4, but not with dec-by-8. The HSDC Pro GUI allows the dec-by-8 settings, but does not seem to produce the proper operating conditions for signal processing.

I successfully saved a dec-by-4 DDR P54 csv file; could this be modified to provide the dec-by-8 mode I am wanting to use?  I'm wondering if this has something to do with the "dead-spot" as described in this E2E post: https://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/539082/1966099#1966099 ?

~Leonard 

  • 0
    TI__Genius 12965 points
    Leonard,

    The Virtex 7 family uses the GTH transceivers which do not have the same limitation as the GTX transceivers which have a 8-9.8Gbps gap in the QPLL. Your VC707 should work ok.

    The current HSDC Pro 4.30 support for VC707 using the TSW14J10 only supports ADC12J4000 in bypass, dec10, and dec4 modes. Where did you get the INI for dec8? There may be a problem with the bit packing format.

    Ken
  • 0 in reply to Ken C
    TI__Guru* 91947 points

    Leonard,

    What is the ADC sample rate you are using in Dec 8 mode?

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 50 points

    Jim,

    Leonard entered this question on my behalf.  The ADC sample rate I am attempting to use for the dec-by-8 experiment is 4.000GSPS.  The previously mentioned dec-by-4 DDR P54 csv file also had a ADC sample rate of 4.000GSPS.

    The HSDC Pro I am using is 4.20 (not 4.30) in case that matters.  I don't really understand the role of the INI files in the operation.  (Perhaps you could explain that or point me at the right part of a document that explains that).  

    As you point out there is not an INI file for dec-by-8 on HSDC Pro.  I was hoping I could still force the ADC12J2000EVM to operate in dec-by-8 mode (via the ADC12J2000EVM GUI) and then extract the data from the VC707 using HSDC Pro>>File>> Save I32Codes as CSV File to look at later in Matlab or MS Excel...  

    Mark

  • 0 in reply to Mark Lucas
    TI__Genius 12965 points
    Mark,

    The HSDC Pro 4.20 is fine. The INI files located in each of the directories tells HSDC Pro how to control the attached capture card. It allows HSDC Pro to use a different DLL to give commands appropriate to that particular capture card.

    If you are connected as the TSW14J10VC707 you would see which device configurations have been tested and validated on that capture card in the device selection pull down. Although the dec8 mode is not yet supported on the VC707, it could be validated and then it could be included in the next HSDC Pro release. Along with the appropriate INI for the capture card, there may also be some differences in the clocks required by the FPGA.

    By default all of our ADC and DACs work with the TSW14J56revD so all of our ADC device GUI configurations are geared to using that platform/FPGA, however the Xilinx VC707 platform may require different clocking and in that case you cannot use the existing ADC device GUI settings. You may need a custom divider for the FPGA clock (if wrong this may cause a DDR time out when clicking capture in HSDC Pro) and a new bit packing pattern to ensure the samples are extracted appropriately from the output octets.

    We will confirm this and send you the appropriate ini and configs to run the ADC12J4000+TSW14J10+VC707 in dec8 mode.

    Ken