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RE: frame clock error in read DDR to file

Other Parts Discussed in Thread: ADS6445, ADS5282, AFE5818How to check the data clock and frame clock? I got the error like
Error 91 occured at Variant to data in TSW1400.lvib:Frame.vi

Possible reason(s):
LabView: The data type of the variant is not compatible with the data type wired to the type input.
  • Hi,

    if you are getting an error message from HSDCPro while using the TSW1400, please provide a screenshot of HSDCPro and information about what EVM you are using and what mode of operation you are trying to use.   There is very little to work with here.   From another posting that you just replied to, that other posting was in reference to an ADS6445 that someone was using but I don't know if that is also what you are using.

    For 'checking' the data clock, there is an LED on the TSW1400 that is illuminated when the FPGA on the TSW1400 sees the LVDS clock from the A/D converter and the FPGA is able to lock onto it.   The User Guide for the TSW1400 is on the TI web site, and the LED labeled USER_LED3 is illuminated if the FPGA is able to see the clock from the ADC.    For a few EVMs that use two clocks then USER_LED4 will illuminate if the second clock is present but this LED will be off for most EVMs.   for 'checking' frame clock, I think you might have to check it with an oscilloscope. 

    If you are using one of our devices that have a serialized data format (such as in the two postings that you are replying to) then the data is clocked into the FPGA using the data clock, and the frame clock can be though of as an extra data channel that happens to have a known data pattern, usually '1's followed by '0's so that the frame clock actually does look like a clock signal.  The data sheet for the device you are using will have diagrams showing what the data format including frame clock look like.  The FPGA firmware will use this frame clock signal to look to see where the boundaries of the serialized data are between one sample and the next.

    if you are using one of our EVMs with the TSW1400 and HSDCPro, then the configuration of the EVM must match up with the device selection in HSDCPro, for example - things like the 14/16bit selection in the ADS6445, or the msb-first/lsb-first in the ADS5282.    These things must all match up for the FPGA firmware to be able to get the data properly.   That is where I need to know what device you are using and how you are trying to use it before I could help.

    Regards,

    Richard P.

  • i interface the TSW1400 and AFE5818. I follow the AFE5818 User guide. In that user guide second point is "initialize the device". When i press the initialize the device button in GUI, it is going to updating state and communication with tsw1400 state. After getting 100% pop up window, the following error is shown in TSW1400 GUI. Please see the following link, to see the image
    e2e.ti.com/.../544774
  • Hi,

    The AFE5818 is supported by the Medical Group, and would have to be addressed in the Medical forum.  (Even if the AFE5818 were used in a medical application, it is still their device to support, as they know the device.)  

    I will split this thread and transfer you over to the Medical Forum.

    Regards,

    Richard P.