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ADC08B3000 capture buffer

Thomas Heller
Prodigy 40 points

I have two questions regarding the capture buffer.

1. Is it possible to fill the capture buffer in several chunks by
pulsing the Write Enable (WEN) signal?

I would like to digitize the analog input only when the input level is above
a certain limit, say 5 mV.  So I would connect the output of a fast
comparator to the WEN pin.

2. The meaning of the section 'Coordinating Read Enable (REN) and
Write Enable (WEN)' in page 39 of the datasheet is nor clear to me.

What happens if WEN and REN are asserted at the same time?  Does WEN
superseeds and REN is simply ignored, or does this freeze the capture
buffer operation until a RESET is applied?

  • 0
    TI__Mastermind 44560 points

    Hi Thomas

    1. Yes it would be possible to do this. However please keep in mind that at 3 GHz clock rate, the 4k capture buffer can be completely filled in approximately 1.37 microseconds. For this reason it is recommended to set ASW=1 to automatically stop writing to the buffer once it is full.

    2. Only WEN or REN should be asserted, not both at the same time. The capture buffer cannot be written to and read from at the same time. The read process should only be started once the FF flag is set and the WEN signal is set low.

    The write and read mechanisms of the device do not allow the buffer to be used in a circular buffer fashion with arbitrary start and end points.

    Best regards,

    Jim B