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DRL RLD documentation WCT? examples circuits am I misinterpreting what the wct is?

josh wojnas
Intellectual 805 points
Other Parts Discussed in Thread: ADS1298

DRL RLD documentation WCT? I am looking at the openEXG2 design & the buffer for multiple channels seems to be it would be the DRL amp with being non inverting buffering the output and wct in that would output the buffered wct signal that is the common mode signal to be inverted and sent to the body by a external opamp for multiple ads1298 chips?

or

does the RLD amp in the ads1298 has to be inverting and ch1-8 be the input then the external opamp be non inverting?

  • Intellectual 805 points

    rldinv pin of the DRL amp negitive seem to be the only input from the common mode signals the adverage might not be the same off the wct.


    does that mean the chip that summs the signals together is a buffer?

    If I wanted to use many channels and RLDNEG is connected to all and is inverting & their is a noninverting buffer for all of the ads1298's chips connected together in standard mode and makes one drl signal?