Hello,
My application is Folw-Cytometry, and I will use multi-channel data acquisition board design.
I am very interested at this chip. I have two questions about the application of this chip:
- About the input clock frequency of LCLKP/N, normally LCLKP/N(31/32 pin) is 7 times of CLKP/N(72/73 pin).
But when the decimation 4 is enable, what is the input clock frequency of LCLKP/N? 7/4 times of of CLKP/N?
And there is the same question about ACLKP/N
Pin LCLKP, LCLKN -- Differential LVDS bit clock (7X)
Pin ACLKP, ACLKN-- Differential LVDS frame clock (1X)
- About the AD driver. We plan to use differential amplifier to drive ADS5294. Is it possible to place the differential amplifier in another board, the differential signals are sent to ADS5294 through HDMI wire.
Is this a requirement to place the differential driver close to ADS5294?
