Hi
I have some questions concerning the JESD_WR_SEL register bit of ADS52J90 (datasheet reference SBAS690B):
- Table 105, JESD register map: It says that the JESD_WR_SEL bit must be set for registers 115 to 119 and 134 to 138. However, in the register descriptions (table 106 and following), this is only mentioned for registers 134 to 138, but not for registers 115 to 119. Also, on the actual device, i can write to e.g. register 115 although the JESD_WR_SEL bit is not set.
- It seems to me that for reading registers 134 to 138, the JESD_WR_SEL register bit must be set, but not for registers 115 to 119. Can you confirm?
Kind regards
Frank
