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ADS1262 EVM PGARAIL_FAULT with ADCPro

Ivan Chou61
Intellectual 350 points
Other Parts Discussed in Thread: ADCPRO, ADS1262

I try to use ADS1262EVm to measure a voltage (2V) from power supply with INP0 (1.9xxV) & INP1 (0V)

From this post

https://e2e.ti.com/blogs_/b/precisionhub/archive/2015/07/21/riding-the-rails-understanding-pga-input-range-requirements-with-the-ads1262

There are a few actions you can take to make sure that you don’t violate the PGA’s input range requirements:

1. Level shifting

2. Bipolar supplies

3. Bypass the PGA

 

 

 

 

Thus, I bypass PGA, but the PGARAIL_FAULT still occur. Why?  The results seems to be okay, but the warning continues to pops out.

  • 0
    TI__Mastermind 44680 points

    Hi Ivan,

    This error occurs whenever one of the ADC inputs is within 0.2V of AVDD:

    This error flag is only relevant when the PGA is enabled. This error means that the PGA output is getting close to the rail and the PGA is no longer providing a linear gain.

    However, if the PGA is bypassed this error flag can be disregarded. In this mode, you're not concerned about the PGA being non-linear and the ADC will accept voltages between AVSS - 0.1 V and AVDD + 0.1 V.

     

    ... In my opinion, it would be nice if this error flag was disabled OR the threshold increased, so that it could also provide a useful function when the PGA is bypassed, but unfortunately that is not the case.

     

    Best Regards,
    Chris

  • 0 in reply to Christopher Hall
    Intellectual 350 points

    update the information . ADCPro reported warning should be:

  • 0 in reply to Christopher Hall
    Intellectual 350 points

    hi Chris,

    Update:  ADCPro reported warning should be PGARAIL_N_FAULT

    from your earlier answer, if I bypass the PGA, I just ignore this warning message?

    And just make sure my input range is  AVSS-0.1V < AINP, AINN < AVDD+0.1, right?

    It is strange that the PGARAIL_FAULT bit is set in status byte even if I bypass PGA...

    regards,

                   Ivan

  • 0 in reply to Ivan Chou61
    TI__Mastermind 44680 points

    Hi Ivan,

    Ivan Chou61 said:

    from your earlier answer, if I bypass the PGA, I just ignore this warning message?

    And just make sure my input range is  AVSS-0.1V < AINP, AINN < AVDD+0.1, right?

    That's correct! Since the PGA monitor connects to the modulator inputs it will be active even when the PGA is bypassed. In this case, it is up to you to ensure that the input in is within the modulator's input range.

    I agree that this behavior is odd!

    Best Regards,
    Chris

  • 0 in reply to Christopher Hall
    Intellectual 350 points
    Chris,
    thank you for your explanation. Another question is
    Because I plan to measure the signal near 0V (50mV or lower) and make PGA ENABLED, bipolar power should be considered, right?

    Can I set AVDD = 4V and AVSS = -1V? From the ref design, AVDD and AVSS are symmetric, i.e., 2.5V & -2.5V respectively


    thanks


    ivan
  • 0 in reply to Ivan Chou61
    TI__Mastermind 44680 points

    Hi Ivan,

    Ivan Chou61 said:
    Can I set AVDD = 4V and AVSS = -1V? From the ref design, AVDD and AVSS are symmetric, i.e., 2.5V & -2.5V respectively

    Yes, this is perfectly acceptable! Just keep in mind that everything that is referenced to AVSS will now be shifted by -1V. Therefore, REFOUT will now be 1.5 V with respect to ground.

    You can also double check the input range requirements using the ADS1262 PGA1 Input Range Calculator, which is part of the ADS126x Excel Calculator Tool:  

    Best Regards,
    Chris

  • 0 in reply to Christopher Hall
    Intellectual 350 points
    thanks. It helps a lot.
  • 0 in reply to Ivan Chou61
    TI__Mastermind 44680 points
    Hi Ivan,

    You're welcome! Let me know if you have any other questions I help with!

    Best Regards,
    Chris