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ADC12J4000 JESD240B Parameter_K

Alber, Moon
Intellectual 720 points
Other Parts Discussed in Thread: ADC12J4000, ADC12J4000EVM

Hello

I'm Alber as FAE in Arrow Korea.

My customer will use ADC12J4000 at 20x decimation & DDR & non-P54 mode.

Accoring to Datasheet page 40, there was wrote about 'Legal K Range' is 8-32.

But on the configuraion file of ADC12J4000 EVK Tool(ADC12J4000_DB20_DDR.cfg), there was applid that KM1 value is '5'.

Which number was right number & range?

ADC12J4000
0x0021 0x00 // Initiate reset of all registers
0x0021 0x01 // De-assert reset
0x0030 0x00 // SYSREF receiver and processor off
0x0040 0x04 // Set serializer pre-emphasis for high speed PCB
0x0066 0x03 // Foreground calibration mode with timing optimization enabled
0x002B 0x13 // Change reserved register to proper setting
0x0208 0x07 // Change over-range processing to longest interval
0x0051 0x84 // Calibration optimized for large signals
0x0201 0x96 // Scrambler on, KM1 = 5, DDR, JESD disabled
0x0200 0x16 // 6.02dB gain, decimate-by-20
0x0202 0x40 // P54 PLL off, Differential SYNC, Normal data mode
0x0201 0x97 // Scrambler on, KM1 = 5, DDR, JESD enabled
0x0050 0x0E // Initiate a foreground calibration

  • 0
    TI__Mastermind 44680 points

    Hi Alber

    The datasheet is correct. The K value used in the ADC12J4000EVM GUI for DB20, DDR mode is not correct. It should be one of the following values:

    8, 12, 16, 20, 24, 28, 32

    The KM1 value programmed into the ADC register will be 'K Minus 1' or 1 less than the K value selected.

    The KM1 value should be changed from 5 to 7 or 11, etc.

    The evaluation tool functions OK because the ADC SYSREF is not turned on, and SYSREF processing is disabled. If SYSREF was used, there would be problems aligning the LMFC properly.

    I will make a note to update the settings in a future revision of the EVM GUI and HSDC Pro.

    Best regards,

    Jim B