Interfacing problem in connection of FPGA altera cycloneiv gx device and DAC5652

Lalit,

Someone will get back with you with some more details on this DAC setup.

In the meantime please confirm that you have the proper power/clock connections along with a known working pattern generator to confirm that the DAC EVM is setup properly.
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If you are certain that the data is getting to the input bus then please check the clock provided to the DAC.

Ken.

Lalit,

Are you still having problems with your setup?

Regards,

Jim

hello,

yes I am still in problem.

let me tell you what I did while connection.

I am using DAC5652 in single mode so grounded this p[in.

"SLEEP" pin and "GSET" pins are also grounded.

"clock" and "WRITE clock" both are shorted.

only one supply  of 3.4V for both analog and digital supply I am using.

should I use separate supplty for both??

ground pins are connected through the ground of FPGA board.

please suggest me If I am doing any mistake.

the digital input data and clock data input are coming at corresponding pins but output is not coming

thanking you

best regards,

Lalit singh

Hi Lalit,

To check if the board is function you should first test the board in dual input mode. All you need to change is connect MODE pin to GND and change the FPGA CODE to send data to both inputs. This will enable the dual bus mode. As you mentioned the WRT1 & CLK1 are shorted together so please provide the sinusoidal signal to WRT1 or CLK1 along with data from FPGA and you should see the output signal. If you don't see the output signal make sure you are meeting the setup(Tsu) and hold(th) and other timing requirements as shown in figure 16 of the datasheet for this mode(value are on page 7 of the datasheet). If you get this one working we can proceed to single-bus interleaved mode.

Regards,
Neeraj Gill