ENOB and Resolution

Hi Hari,

ENOB is derived from SINAD specification of the ADC. ENOB specification covers noise and distortion aspects of the converter. You can read more about ENOB and resolution in this blog.

Depending on application one may choose ENOB or resolution as selection criteria. In a DC measurement application, with moderate throughput, distortion does not play a significant role and in this case ENOB will be a conservative representation of ADC.

Regards,
Rahul

Hi Rahul,

Thank you very much. I have one more question
ENOB is given by "(SINAD(DB)-1.76)/6.02".Will this equation is sufficient for calculating ENOB .Because when I am placing an ADC in a PCB
there will be lot of other noise sources like switching regulators,other high speed signals etc.
Do we need to consider all other noise sources in the board before calculation. If yes please explain the procedure.

Thanks&Regards
Hari

Hi Hari,

SINAD (Signal Noise and Distortion) effectively represents the noise and harmonic distortion of the system. The SINAD performance mentioned in ADC data-sheet is computed in a "clean" signal-chain (no switching tones or interference). This is purely an ADC specification. You could interpret the data-sheet SINAD number as - given the system (without the ADC) is ideal with no noise and distortion sources, what would be the noise and distortion caused by the ADC -> SINAD of ADC.

In your case, if you have switching components, they will results in tones which will occur at the switching frequency. With proper layout practices the impact of switching components on signal integrity can be minimized. You can always verify if the SINAD of your system is same as the SINAD in ADC data-sheet by applying the test tone mentioned in ADC data-sheet.

Typically, a 2-kHz sine-wave is used as test tone. Compute the FFT of captured data and evaluate the SINAD. You could read through this document for understanding how SINAD is computed.

Please refer to section 2 "Spectral Performance Terminology".

Regards,
Rahul

Hi Rahul,
Thank you for your time.I have one more question
Is there any relation between adc linearity and input current?
Imagine I am designing an Anti aliasing filter.Let it be simple RC circuit for a particular frequency F.Then which component I need to fix first "R" or "C". In some notes I have read we need to fix C in such a way that it should be 10 times larger than the sampling capacitor and find the value of "R". In some other notes fix "R" and find "C"
Which method is correct.

Regards
Hari

Hi Hari,

The capacitor external to the ADC acts as a charge reservoir to absorb ADC's kick-back. Depending on the bandwidth and settling characteristics of your driver amplifier, you can decide how much of the kick-back is handled by the capacitor.

Typical recommendation is to keep the C 20 times sampling capacitor. Hence, 1/20th i.e. 5% of the charge must be provided by the ADC driver. 

Once you have decided the charge sharing ratio, you can then use R to limit the bandwidth of the driver amplifier and to make it stable with the capacitive load,

This article has a detailed step by step procedure for designing the front end driver for SAR-ADC.

Which op-amp are you using for driving the ADC?

Regards,
Rahul

Hi Rahul,

Could you please explain me "ADC KICK BACK".

Regards
Hari

Hi Hari,

If you refer to Page 19 of the document I pointed to in my previous post (www.ti.com/.../slyp166.pdf), they have described the charge transients on analog input pin of a SAR-ADC.

That section explains the ADC kick-back.

P.S. It would be great if you could verify the answers to previous queries regarding ENOB, SINAD and SAR-ADC front-end design. This helps others with similar queries know that these questions have been answered on the forum and they can readily refer to our discussion.

Regards,
Rahul