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DAC8881 Timing for 1.8V I/O

Other Parts Discussed in Thread: DAC8881

Hi folks - 

The DAC8881 data sheet includes timing specifications for IOVDD down to 2.7V, but that the interface can operate down to 1.8V with degraded timing and temperature performance.  Can we give some guidance as to what direction the specifications will move and a ball park on how much? 

Thanks,
Jake

  • Howdy Jake,

    I've currently forwarded this question to design and test.  If there is additional information that I can publish I will attach it to this thread.  Thank you for your inquiry.

    Best Regards,

    Matt

  • Howdy Jake,

    It looks like one of my colleagues was finding this information in parallel -- that's super fast service for ya. It looks like the maximum clock frequency will be 20MHz at an IOVDD voltage of 1.8V. The input signal timing parameters will slightly be more relaxed at this voltage, but since the maximum SCLK frequency at 1.8V is still relatively high, it should be ok to use the minimum timing parameters specified in the datasheet for an IOVDD voltage of 2.7V.

    If you have any other questions please let me know.

    Best Regards,
    Matt