Hello,
My customer have some questions about SYSREF processing for ADC12J4000.
[Q1]
Is my understanding correct ?
<My understanding>
In case of Periodic (Continuous) SYSREF, the JESD204B synchronization process is carried out in the first SYSREF rising edge.
When synchronization is established, the subsequent edges are ignored.
[Q2]
In case of Periodic SYSREF, why must the SYSREF processing in the ADC be disabled before the ADC SYSREF is turned off at the LMK04828 ?
If the SYSREF processing remains an enable when SYSREF is turned off, What kind of risk is there ?
This question is related to previous my thread (ADC12J4000 - Your recommendation for SYSREF type).
[Q3]
In case of DC coupled SYSREF, why does the ADC not need to disable SYSREF processing ?
In this case, is there any risk ?
This question is related to previous my thread (ADC12J4000 - Your recommendation for SYSREF type).
These questions are caused by our understanding of SYSREF processing for ADC12J4000 being in sufficient.
I want to know the detail for the SYSREF processing.
Please help us !
Best Regards,
Hiroshi Katsunaga