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DOUT in ADS1178

Liang Huang
Prodigy 60 points
Other Parts Discussed in Thread: ADS1178, OMAP-L137

Hi

I work on a  OMAP-L137 starter kit  with only one  ADS1178.  The ADS1178 is set as following: fCLK = 27MHz, fSCLK = fCLK, CLKDIV = 1, MODE = 0, FORMAT[2:0] = 001(SPI with TDM in Fixed mode) , PWDN1~PWDN8 = 1. When using only one ADS1178, DIN pin should be tied low (on page 18 of ADS1178 Data Sheet ). But the DIN pin is not connected in the starter kit and is floating. So the ADS1178 in my starter kit  will work on a  "dummy daisy-chaining" condition, and the "data" shifted in using DIN appear on DOUT1 after all channel data have been shifted out even if  there is no any  valid data input through the DIN pin actually? I mean whether the data are shifted out on DOUT1 pin in this way:CH1~CH8—>DIN( together 24 channels in the configuration)—>CH1~CH8—>DIN—>CH1~CH8—>…… (not in this way :CH1~CH8—>CH1~CH8—>……  )? This confused me.

Regards

Liang

  • 0
    TI__Mastermind 43915 points

    Hi Liang, 

    The Daisy-Chain data format is shown in Figure 22 on page 21 of the ADS1178 data sheet. If two devices are chained together, then the converted data from second device (device you are reading DOUT from), is first output followed by the outputted data from the first device (U2). When daisy chain mode is not to be used, the DIN must be connected to GND, otherwise it will float and some floating value will be converted.

    Is your "starter kit" the ADS1178EVM or some other board? The EVM board's DIN is connected to the J5 header if you would like to daisy chain. I recommend tying it to ground if you do not want to use daisy chain mode. 

    Regards,

    Tony Calabria 

  • 0 in reply to Tony Calabria
    Prodigy 60 points

    Hi Tony

     It is a OMAP-L137 DSP development board and achieves the AD function using one ADS1178 chip on the development board.

    Regards,

    Liang

  • 0 in reply to Liang Huang
    TI__Guru**** 181021 points

    Hi Liang,

    Is this development board the SEED-DEC137 by chance?

  • 0 in reply to Tom Hendrick
    Prodigy 60 points

    Hi Tom,

    Yes, it is. SEED-DEC137 operates in "master" or "slave" mode for using the ADC. In the "master" mode, the SPI of the OMAP-L137 operates in master mode and the ADS1178 operates in slave mode. In the "slave" mode, both the OMAP-L137 and ADS1178 operate in slave mode, and the CPLD on the board will work as a master and output a clock to drive the SPI0_CLK(OMAP-L137) and SCLK(ADS1178). Because the DIN pin float and some floating value will be converted, it's difficult (seems impossible) to program the EDMA channel to receive the data continuously from the ADS1178 DOUT when SEED-DEC137 operates in "master" mode. I have tried many times, and the received the data is not correct except the first 8 channels data. When SEED-DEC137 operates in "slave", the received the data is correct, but I don't know the output clock frequency of the CPLD and whether the the output clock frequency still can be changed and programmable. It seems that the output clock frequency of the CPLD is too high for me (I am gona to sample the data with about 10k). If the DIN pin is connected to GND, and the ADS1178 is set as:fCLK = 27MHz, fSCLK = fCLK, CLKDIV = 1, MODE = 0, FORMAT[2:0] = 001(SPI with TDM in Fixed mode) , PWDN1~PWDN8 = 1. Is it take 128/fSCLK time(quarter of the 1/fDATA time) to shift out each 8 channels data? After each 8 channels data have been shifted out, what is the output of DOUT in the rest time(three-quarters of the 1/fDATA time)?

    Regards,

    Liang