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ADS52J90 differential inputs

Paul Smith
Prodigy 250 points
Other Parts Discussed in Thread: ADS52J90, ADS52J90EVMSo, the ADS52J90 datasheet on page 65 shows 10 nF coupling caps to CLKP & CLKM, but no termination resistor. The ADS52J90EVM schematics on sheet 2 shows 100 nF coupling caps and a 100 ohm termination resistor. I presume the EVM schematics are correct and the data sheet is not? The EVM schematic also shows 100 ohm terminations for SYNC~ and SYSREF, and DC coupling for SYNC~ and 100 nF AC coupling for SYSREF. AC/DC coupling for SYNC~ & SYSREF is not discussed in the datasheet, but again I presume the schematic is correct as it is consistent with the JESD204B standard. What if SYSREF is not used? (ie JESD204B subclass 2) Can the SYSREF input pins be left open? If not, what do they need to bias them correctly?
  • 0
    TI__Mastermind 49956 points
    Hi Paul,

    The 10nF will be a more aggressive HPF compared to 100nF coupling caps. Either would work but follow the datasheet recommendations.

    The default clock output mode in the EVM is using the Clock distribution LVDS output.
    100 ohm termination resistor was used for proper termination of LVDS output in the EVM.
    The EVM also allows for biasing LVPECL termination.

    For JESD204B (Subclass 2) mode, the SYSREF input pins can be left floating.
  • 0 in reply to Praveen Aroul
    Prodigy 250 points
    Hi Praveen,

    Thank you for your prompt and informative answer.

    Paul