ADC342x power down

Hi Laurent
Most of the support team is out of office for the US Thanksgiving holiday. Someone will be able to respond to this early next week.
Best regards,
Jim B

Laurent,

This register bit configures the power state entered when the PDN pin is asserted high. Depending on the state of this bit, the device will either enter global power down (5mW power consumption with 85us wake up time) or standby (45mW power consumption with 35us wake up time) with PDN is asserted high.

If PDN is deasserted low, the device will be in normal operation mode unless bit 2 or 3 of register 15h are asserted high. This gives you the option of controlling the power state of the device with either the PDN pin or with register writes.

Please let us know if you have any further questions.

Thanks,
Dave

Hi Dave,

I still do not understand the advantage of this bit compared to bit 2 and bit 3:
If the PDN pin bit value = 0 we are in a global power down which is redundant to the bit 2 value = 1
If the PDN pin bit value = 1 we are in a standby mode which is redundant to the bit 3 value = 1

By the way, what is the expected dissipated power reduction if only one channel is switched off (bit 4 or 5 or 6 or 7) based on 80MSPS and 2wire configuration?

Thanks

Laurent

Laurent,

Bits 2 and 3 can be used to place the device in standby or gobal power-down modes regardless of the state of the PDN pin. Bit 0 is used to control what assertion of the PDN pin does.

There is not a way to power down just one of the channel of the device. In other words, they are either both powered on or both powered off.

Thanks,
Dave

Hi Dave,

Are those following configurations correct and availbale ?

1. only 1 channel OFF / 3 channels ON:
bit 7 = 1 => channel A power down
bit 6 = 0 => channel B normal
bit 5 = 0 => channel C normal
bit 4 = 0 => channel D normal
bit 3 = 0
bit 2 = 0
bit 0 = don't know

2. Only 2 channels OFF / 2 channels ON:
bit 7 = 1 => channel A power down
bit 6 = 1 => channel B power down
bit 5 = 0 => channel C normal
bit 4 = 0 => channel D normal
bit 3 = 0
bit 2 = 0
bit 0 = don't know

3. all channels OFF:
Either:
bit 7 = 0 => channel A normal
bit 6 = 0 => channel B normal
bit 5 = 0 => channel C normal
bit 4 = 0 => channel D normal
bit 3 = 0
bit 2 = 1 => global power down
bit 0 = don't know

Or:
bit 7 = 1 => channel A power down
bit 6 = 1 => channel B power down
bit 5 = 1 => channel C power down
bit 4 = 1 => channel D power down
bit 3 = 0
bit 2 = 1 => global power down
bit 0 = don't know

Please give the recommended value of the bit 0 for each relevant configuration.
Thanks a lot for your feedback

Laurent

Laurent,

I mispoke earlier when I said that you couldn't power down individual channels. I think I was looking at the dual channel version of the device. Your register settings all look correct.

Bit 0 only matters if you assert the PDN pin high. If you keep it low, it doesn't matter the setting. Does this make sense?

Thanks,
Dave

Hi Dave,

Yes it makes sense.

So, if I want to power down only 2 channels among the 4, what will be the new dissipated power (4 channels based on 80 MSPS at a 2-wire mode: Pdiss = 310mW according to figure 125) ?

Thanks

Laurent