Hi,
I am working with a ADS62P43 EVM board. I had purchased this board , but it was found defective . After several troubleshooting steps , I couldnt get a clock output from the board. SO I was advised by TI support to replace the board with a new board. I have the new board right now. I am trying to achieve a Parallel CMOS interface. So I have set the following jumper settings
- JP15(2-3) and JP16(2-3)
- JP8(1-2), JP9(1-2) , JP10(1-2, JP11(1-2), JP5(1-2), JP6(1-2), JP7 (1-2)
- JP12(1-2) and JP14(7-8)
I am providing a 2 MHz clock input to the SMA pin J4 from a function generator (1.5 V p-p).
I am powering the board with a 5V supply in P5 and P4 ( Shorted P4 and P2)
After these settings, I am able to receive a 2 MHz clock output from the header J8(pin 56) which is meant for LVDS interface. But I am not able to get a clock output on pin 39 of the J1 header which is for CMOS interface. I traced back the route in the board and I found out that the clock pin 39 in JI connector is not connected to the clock out coming from the ADS62p43 chip.
What possible steps can I take to solve this issue??
You can call me on +1 5196978104 if possible. Anticipating your reply.
Mahadevan