TSW1400EVM: Saving data using TSW1400EVM

I inform that my FPGA Board conditions.

LED0~LED3 are on.

LED4 is off.

LED5 is on.

LED6,7 is off.

thanks.

Cho,

Unfortunately, the TSW1400EVm cannot do what you are asking for. Your best bet would be to look into a logic analyzer that can capture large amounts of data.

Regards,

Jim

Hi, Jim

First of all thank you for your reply.

Can you tell me why? 

I saw that TSW1400EVM's samples is limited by it's data size. not  time. ( In HSDC Pro user guide)

I wonder why this happened.

and What product can I use to measure long time at least 1 minute.

thank you. 

Hi Cho,

For you to capture 16b samples at 250Msps and for 1 minute (60s) that means you need something capable of capturing 15 Gsamples.  None of our capture cards can capture this memory depth contiguously.

The TSW1400 is limited to 512Msamples, it is 1GByte of memory which requires 2 bytes for 16bits, and then is only 512M samples max.  The TSW14J56 has 32Gbits (or 16GBytes)of memory which is about 2Gsamples of 16 bits.

The firmware is also not setup to parse data continuosly out of the FPGA.  Currently the mode operation is to capture the data into DDR memory and then transfer it out via USB.  As such it can not capture more than the memory depth on the capture card.  If you capture another buffer it is not contiguous to the other captures.

Ken

Hi, Ken

As you know, I use 250Msps, 16bit ADC.

But I am measuring the signal at 1Msps rather than 250Msps.
In this case the saved data(in csv file) is just about 28.1MB.
this measurement time is 10.3 seconds.


so I think that I can get more data at least 1 minutes.

if my thoughts are wrong, data value is limited by absolute time. right?

thank you for your reply.

Hi Cho

Please note that the ADS4149 you mentioned has a minimum sampling rate of 20Msps.

If your desired sampling rate is 1Msps you should consider a different ADC.

Best regards,

Jim B

thanks Jim B

I know that.

but i used the adc board in 1Msps clock speed. i is still working !!

it is not a focus in our conversation.



i want to know why data acquisition is limited by time(10.3seconds) not a data memory.

clearly, there is a mention that #samples value is limited by memory of TSW EVM.


I really want to know that.


once again, thank you for your reply

Cho,

Data acquisition is related to memory size. The faster you are capturing data though, the faster this will occur.

Regards,

Jim

Hi Jim

 

thank you for your reply.

 

there is too many misunderstanding with you.

 

I know that Data acquisition is related to memory size.

 

 

I used my ADC Board(ads4149 evm). and sampling rate is 1.00Msps.

I also know the minimun sampling rate is 20Msps.

But I used my ADC Board to subsample.

Clearly there is no problem in using my ADC Board.

 

I Have a trouble in using FPGA and HSDC Pro.

 

for instance

 

1) sampling rate is 1.00Msps.

in this case, I used 28MB to obtain 10seconds of data.

 

2) sampling rate is 5.00Msps.

in this case, I used 150MB to obtain 10seconds of data.

 

that means I can get more data more than 10 seconds.

because I just used memory under 512MB.

 

But under any circumstances, It is impossible to obtain more than 10seconds of data even though there is enough memory space in FPGA memory.

(I attached a table comparing the size of the memory and the measurement time of the data.)

 

So I wonder if there is a limit to absolute time(about 10seconds) rather than memory size.

 

I really want to obtain a data acquisition time. please help me.

 

if I can do this by using TSW1400EVM, Can you suggest me another equipment?

 

thank you.

<Comparing table>

file format is  .csv

Hi Jim

 

thank you for your reply.

 

there is too many misunderstanding with you.

 

I know that Data acquisition is related to memory size.

 

 

I used my ADC Board(ads4149 evm). and sampling rate is 1.00Msps.

I also know the minimun sampling rate is 20Msps.

But I used my ADC Board to subsample.

Clearly there is no problem in using my ADC Board.

 

I Have a trouble in using FPGA and HSDC Pro.

 

for instance

 

1) sampling rate is 1.00Msps.

in this case, I used 28MB to obtain 10seconds of data.

 

2) sampling rate is 5.00Msps.

in this case, I used 150MB to obtain 10seconds of data.

 

that means I can get more data more than 10 seconds.

because I just used memory under 512MB.

 

But under any circumstances, It is impossible to obtain more than 10seconds of data even though there is enough memory space in FPGA memory.

(I attached a table comparing the size of the memory and the measurement time of the data.)

 

So I wonder if there is a limit to absolute time(about 10seconds) rather than memory size.

 

I really want to obtain a data acquisition time. please help me.

 

if I can do this by using TSW1400EVM, Can you suggest me another equipment?

 

thank you.

<Comparing table>

 

file format is  .csv

Cho,

You may be setting the clock rate so slow and when using a large capture depth, there may be a bug that HSDCPro is timing out before the entire capture can finish. We think  the GUI is timing out after about 10 to 15 seconds. We are looking into this issue.

 

Regards,

 

Jim

first of all, thank you so much.

how long will it take to get an answer?

I want to get an answer as soon as possible.

or i need to use another EVM board. thanks