Part Number: ADS131E04
Hi all!
I am building a system with different boards, each with ad ADS131E04 on it, and I have to synchronize them as much as possible. The SPI, START and DRDY pins, local to all of the boards, are all remotized on a single acquisition system. To do this, I use differential drivers and receivers and isolators, which give a somewhat random delay to all signals. Moreover, I can have different cable lengths which add delay as well.
In order to synchronize, I use programmable delay lines, but I first need to know precisely how DRDY works when I pull the START pin up. If I have a deterministic "time distance" between the two local events (START rising and DRDY falling), I can evaluate all the delays by measuring the total "time distance" between the remote START and remote DRDY signals.
The sequence should be:
- external 2.048 MHz clock running
- START pin set to 1
- DRDY "waits" until the first rising edge of the external clock (I call this time t0)
- DRDY "waits" a known time tSETTLE, depending on the data rate and the clock frequency
- DRDY "waits" until the first data set is ready (I call this time t1)
- DRDY goes down to 0
Essentially, the problem is evaluating t0 and t1. My questions are:
1) Is the sequence correct? In particular, is my guess on the existance of time t0 correct, or does tSETTLE start as soon as START goes to 1?
2) As the data sheet does not mention t1, is there a way to evaluate it?
Thanks in advance for your help.
Stefano
